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Commit 18a073a3 authored by Peter Zijlstra's avatar Peter Zijlstra Committed by Ingo Molnar
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perf, x86: Fix BTS condition 



Currently the x86 backend incorrectly assumes that any BRANCH_INSN
with sample_period==1 is a BTS request. This is not true when we do
frequency driven profiling such as 'perf record -e branches'.

Solves this error:

  $ perf record -e branches ./array
  Error: sys_perf_event_open() syscall returned with 95 (Operation not supported).

Signed-off-by: default avatarPeter Zijlstra <a.p.zijlstra@chello.nl>
Reported-by: default avatarIngo Molnar <mingo@elte.hu>
Cc: "Metzger, Markus T" <markus.t.metzger@intel.com>
Cc: Peter Zijlstra <a.p.zijlstra@chello.nl>
Cc: Arnaldo Carvalho de Melo <acme@redhat.com>
Cc: Frederic Weisbecker <fweisbec@gmail.com>
Link: http://lkml.kernel.org/n/tip-rd2y4ct71hjawzz6fpvsy9hg@git.kernel.org


Signed-off-by: default avatarIngo Molnar <mingo@elte.hu>
parent cd2e49e9

arch/x86/kernel/cpu/perf_event.c

+2 −2
Original line number Diff line number Diff line
@@ -613,8 +613,8 @@ static int x86_setup_perfctr(struct perf_event *event) 
	/*

	 * Branch tracing:

	 */

	if ((attr->config == PERF_COUNT_HW_BRANCH_INSTRUCTIONS) &&

	    (hwc->sample_period == 1)) {

	if (attr->config == PERF_COUNT_HW_BRANCH_INSTRUCTIONS &&

	    !attr->freq && hwc->sample_period == 1) {

		/* BTS is not supported by this architecture. */

		if (!x86_pmu.bts_active)

			return -EOPNOTSUPP;

arch/x86/kernel/cpu/perf_event_intel.c

+3 −0
Original line number Diff line number Diff line
@@ -998,6 +998,9 @@ intel_bts_constraints(struct perf_event *event) 
	struct hw_perf_event *hwc = &event->hw;

	unsigned int hw_event, bts_event;



	if (event->attr.freq)

		return NULL;



	hw_event = hwc->config & INTEL_ARCH_EVENT_MASK;

	bts_event = x86_pmu.event_map(PERF_COUNT_HW_BRANCH_INSTRUCTIONS);