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Commit 1849ecb2 authored by Jean Delvare's avatar Jean Delvare Committed by Dave Airlie
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drm/kms: Make i2c buses faster 



A udelay value of 20 leads to an I2C bus running at only 25 kbps. I2C
devices can typically operate faster than this, 50 kbps should be fine
for all devices (and compliant devices can always stretch the clock if
needed.)

FWIW, the vast majority of framebuffer drivers set udelay to 10
already. So set it to 10 in DRM drivers too, this will make EDID block
reads faster. We might even lower the udelay value later if no problem
is reported.

Signed-off-by: default avatarJean Delvare <jdelvare@suse.de>
Acked-by: default avatarEugeni Dodonov <eugeni.dodonov@intel.com>
Cc: Keith Packard <keithp@keithp.com>
Reviewed-by: default avatarAlex Deucher <alexdeucher@gmail.com>
Signed-off-by: default avatarDave Airlie <airlied@redhat.com>
parent 6d75e83e

drivers/gpu/drm/i915/intel_i2c.c

+1 −1
Original line number Diff line number Diff line
@@ -37,7 +37,7 @@ 


/* Intel GPIO access functions */



#define I2C_RISEFALL_TIME 20

#define I2C_RISEFALL_TIME 10



static inline struct intel_gmbus *

to_intel_gmbus(struct i2c_adapter *i2c)

drivers/gpu/drm/radeon/radeon_i2c.c

+1 −1
Original line number Diff line number Diff line
@@ -925,7 +925,7 @@ struct radeon_i2c_chan *radeon_i2c_create(struct drm_device *dev, 
		i2c->algo.bit.setscl = set_clock;

		i2c->algo.bit.getsda = get_data;

		i2c->algo.bit.getscl = get_clock;

		i2c->algo.bit.udelay = 20;

		i2c->algo.bit.udelay = 10;

		/* vesa says 2.2 ms is enough, 1 jiffy doesn't seem to always

		 * make this, 2 jiffies is a lot more reliable */

		i2c->algo.bit.timeout = 2;