Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 1825b8ed authored by Brian Gerst's avatar Brian Gerst Committed by Tejun Heo
Browse files

x86: remove extra barriers from load_gs_base() 



Impact: optimization

mb() generates an mfence instruction, which is not needed here.  Only
a compiler barrier is needed, and that is handled by the memory clobber
in the wrmsrl function.

Signed-off-by: default avatarBrian Gerst <brgerst@gmail.com>
Signed-off-by: default avatarTejun Heo <tj@kernel.org>
parent b2d2f431

arch/x86/include/asm/processor.h

+0 −3
Original line number Diff line number Diff line
@@ -397,10 +397,7 @@ DECLARE_PER_CPU(char *, irq_stack_ptr); 


static inline void load_gs_base(int cpu)

{

	/* Memory clobbers used to order pda/percpu accesses */

	mb();

	wrmsrl(MSR_GS_BASE, (unsigned long)per_cpu(irq_stack_union.gs_base, cpu));

	mb();

}

#endif