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Commit 17fe356a authored by Arnaud de Turckheim's avatar Arnaud de Turckheim Committed by Greg Kroah-Hartman
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gpio: pcie-idio-24: Fix IRQ Enable Register value 



commit 23a7fdc06ebcc334fa667f0550676b035510b70b upstream.

This fixes the COS Enable Register value for enabling/disabling the
corresponding IRQs bank.

Fixes: 58556204 ("gpio: Add GPIO support for the ACCES PCIe-IDIO-24 family")
Cc: stable@vger.kernel.org
Signed-off-by: default avatarArnaud de Turckheim <quarium@gmail.com>
Reviewed-by: default avatarWilliam Breathitt Gray <vilhelm.gray@gmail.com>
Signed-off-by: default avatarBartosz Golaszewski <bgolaszewski@baylibre.com>
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
parent f3e1eb6b

drivers/gpio/gpio-pcie-idio-24.c

+4 −4
Original line number Diff line number Diff line
@@ -360,13 +360,13 @@ static void idio_24_irq_mask(struct irq_data *data) 
	unsigned long flags;

	const unsigned long bit_offset = irqd_to_hwirq(data) - 24;

	unsigned char new_irq_mask;

	const unsigned long bank_offset = bit_offset/8 * 8;

	const unsigned long bank_offset = bit_offset / 8;

	unsigned char cos_enable_state;



	raw_spin_lock_irqsave(&idio24gpio->lock, flags);



	idio24gpio->irq_mask &= ~BIT(bit_offset);

	new_irq_mask = idio24gpio->irq_mask >> bank_offset;

	new_irq_mask = idio24gpio->irq_mask >> bank_offset * 8;



	if (!new_irq_mask) {

		cos_enable_state = ioread8(&idio24gpio->reg->cos_enable);
@@ -389,12 +389,12 @@ static void idio_24_irq_unmask(struct irq_data *data) 
	unsigned long flags;

	unsigned char prev_irq_mask;

	const unsigned long bit_offset = irqd_to_hwirq(data) - 24;

	const unsigned long bank_offset = bit_offset/8 * 8;

	const unsigned long bank_offset = bit_offset / 8;

	unsigned char cos_enable_state;



	raw_spin_lock_irqsave(&idio24gpio->lock, flags);



	prev_irq_mask = idio24gpio->irq_mask >> bank_offset;

	prev_irq_mask = idio24gpio->irq_mask >> bank_offset * 8;

	idio24gpio->irq_mask |= BIT(bit_offset);



	if (!prev_irq_mask) {