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Commit 17ed9e31 authored by Aneesh Kumar K.V's avatar Aneesh Kumar K.V Committed by Michael Ellerman
Browse files

powerpc/booke: Move nohash headers 



Move the booke related headers below booke/32 or booke/64

Acked-by: default avatarScott Wood <scottwood@freescale.com>
Signed-off-by: default avatarAneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com>
Signed-off-by: default avatarMichael Ellerman <mpe@ellerman.id.au>
parent 1ca72129

arch/powerpc/include/asm/pgtable-ppc32.h→arch/powerpc/include/asm/nohash/32/pgtable.h

+8 −8
Original line number Original line Diff line number Diff line 
#ifndef _ASM_POWERPC_PGTABLE_PPC32_H

#ifndef _ASM_POWERPC_NOHASH_32_PGTABLE_H

#define _ASM_POWERPC_PGTABLE_PPC32_H

#define _ASM_POWERPC_NOHASH_32_PGTABLE_H





#include <asm-generic/pgtable-nopmd.h>

#include <asm-generic/pgtable-nopmd.h>
@@ -106,15 +106,15 @@ extern int icache_44x_need_flush; 
 */

 */





#if defined(CONFIG_40x)

#if defined(CONFIG_40x)

#include <asm/pte-40x.h>

#include <asm/nohash/32/pte-40x.h>

#elif defined(CONFIG_44x)

#elif defined(CONFIG_44x)

#include <asm/pte-44x.h>

#include <asm/nohash/32/pte-44x.h>

#elif defined(CONFIG_FSL_BOOKE) && defined(CONFIG_PTE_64BIT)

#elif defined(CONFIG_FSL_BOOKE) && defined(CONFIG_PTE_64BIT)

#include <asm/pte-book3e.h>

#include <asm/nohash/pte-book3e.h>

#elif defined(CONFIG_FSL_BOOKE)

#elif defined(CONFIG_FSL_BOOKE)

#include <asm/pte-fsl-booke.h>

#include <asm/nohash/32/pte-fsl-booke.h>

#elif defined(CONFIG_8xx)

#elif defined(CONFIG_8xx)

#include <asm/pte-8xx.h>

#include <asm/nohash/32/pte-8xx.h>

#endif

#endif





/* And here we include common definitions */

/* And here we include common definitions */
@@ -340,4 +340,4 @@ extern int get_pteptr(struct mm_struct *mm, unsigned long addr, pte_t **ptep, 




#endif /* !__ASSEMBLY__ */

#endif /* !__ASSEMBLY__ */





#endif /* _ASM_POWERPC_PGTABLE_PPC32_H */
 
#endif /* __ASM_POWERPC_NOHASH_32_PGTABLE_H */

arch/powerpc/include/asm/pte-40x.h→arch/powerpc/include/asm/nohash/32/pte-40x.h

+3 −3
Original line number Original line Diff line number Diff line 
#ifndef _ASM_POWERPC_PTE_40x_H

#ifndef _ASM_POWERPC_NOHASH_32_PTE_40x_H

#define _ASM_POWERPC_PTE_40x_H

#define _ASM_POWERPC_NOHASH_32_PTE_40x_H

#ifdef __KERNEL__

#ifdef __KERNEL__





/*

/*
@@ -61,4 +61,4 @@ 
#define PTE_ATOMIC_UPDATES	1

#define PTE_ATOMIC_UPDATES	1





#endif /* __KERNEL__ */

#endif /* __KERNEL__ */

#endif /*  _ASM_POWERPC_PTE_40x_H */
 
#endif /*  _ASM_POWERPC_NOHASH_32_PTE_40x_H */

arch/powerpc/include/asm/pte-44x.h→arch/powerpc/include/asm/nohash/32/pte-44x.h

+3 −3
Original line number Original line Diff line number Diff line 
#ifndef _ASM_POWERPC_PTE_44x_H

#ifndef _ASM_POWERPC_NOHASH_32_PTE_44x_H

#define _ASM_POWERPC_PTE_44x_H

#define _ASM_POWERPC_NOHASH_32_PTE_44x_H

#ifdef __KERNEL__

#ifdef __KERNEL__





/*

/*
@@ -94,4 +94,4 @@ 








#endif /* __KERNEL__ */

#endif /* __KERNEL__ */

#endif /*  _ASM_POWERPC_PTE_44x_H */
 
#endif /*  _ASM_POWERPC_NOHASH_32_PTE_44x_H */

arch/powerpc/include/asm/pte-8xx.h→arch/powerpc/include/asm/nohash/32/pte-8xx.h

+3 −3
Original line number Original line Diff line number Diff line 
#ifndef _ASM_POWERPC_PTE_8xx_H

#ifndef _ASM_POWERPC_NOHASH_32_PTE_8xx_H

#define _ASM_POWERPC_PTE_8xx_H

#define _ASM_POWERPC_NOHASH_32_PTE_8xx_H

#ifdef __KERNEL__

#ifdef __KERNEL__





/*

/*
@@ -62,4 +62,4 @@ 
				 _PAGE_HWWRITE | _PAGE_EXEC)

				 _PAGE_HWWRITE | _PAGE_EXEC)





#endif /* __KERNEL__ */

#endif /* __KERNEL__ */

#endif /*  _ASM_POWERPC_PTE_8xx_H */
 
#endif /*  _ASM_POWERPC_NOHASH_32_PTE_8xx_H */

arch/powerpc/include/asm/pte-fsl-booke.h→arch/powerpc/include/asm/nohash/32/pte-fsl-booke.h

+3 −3
Original line number Original line Diff line number Diff line 
#ifndef _ASM_POWERPC_PTE_FSL_BOOKE_H

#ifndef _ASM_POWERPC_NOHASH_32_PTE_FSL_BOOKE_H

#define _ASM_POWERPC_PTE_FSL_BOOKE_H

#define _ASM_POWERPC_NOHASH_32_PTE_FSL_BOOKE_H

#ifdef __KERNEL__

#ifdef __KERNEL__





/* PTE bit definitions for Freescale BookE SW loaded TLB MMU based

/* PTE bit definitions for Freescale BookE SW loaded TLB MMU based
@@ -37,4 +37,4 @@ 
#define PTE_WIMGE_SHIFT (6)

#define PTE_WIMGE_SHIFT (6)





#endif /* __KERNEL__ */

#endif /* __KERNEL__ */

#endif /*  _ASM_POWERPC_PTE_FSL_BOOKE_H */
 
#endif /*  _ASM_POWERPC_NOHASH_32_PTE_FSL_BOOKE_H */