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Commit 177ae09b authored by Andres Rodriguez's avatar Andres Rodriguez Committed by Alex Deucher
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drm/amdgpu: introduce AMDGPU_GEM_CREATE_EXPLICIT_SYNC v2 



Introduce a flag to signal that access to a BO will be synchronized
through an external mechanism.

Currently all buffers shared between contexts are subject to implicit
synchronization. However, this is only required for protocols that
currently don't support an explicit synchronization mechanism (DRI2/3).

This patch introduces the AMDGPU_GEM_CREATE_EXPLICIT_SYNC, so that
users can specify when it is safe to disable implicit sync.

v2: only disable explicit sync in amdgpu_cs_ioctl

Reviewed-by: default avatarChristian König <christian.koenig@amd.com>
Signed-off-by: default avatarAndres Rodriguez <andresx7@gmail.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent b82485fd

drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c

+2 −1
Original line number Diff line number Diff line
@@ -705,7 +705,8 @@ static int amdgpu_cs_sync_rings(struct amdgpu_cs_parser *p) 


	list_for_each_entry(e, &p->validated, tv.head) {

		struct reservation_object *resv = e->robj->tbo.resv;

		r = amdgpu_sync_resv(p->adev, &p->job->sync, resv, p->filp);

		r = amdgpu_sync_resv(p->adev, &p->job->sync, resv, p->filp,

				     amdgpu_bo_explicit_sync(e->robj));



		if (r)

			return r;

drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c

+3 −1
Original line number Diff line number Diff line
@@ -212,7 +212,9 @@ int amdgpu_gem_create_ioctl(struct drm_device *dev, void *data, 
		      AMDGPU_GEM_CREATE_NO_CPU_ACCESS |

		      AMDGPU_GEM_CREATE_CPU_GTT_USWC |

		      AMDGPU_GEM_CREATE_VRAM_CLEARED |

		      AMDGPU_GEM_CREATE_VM_ALWAYS_VALID))

		      AMDGPU_GEM_CREATE_VM_ALWAYS_VALID |

		      AMDGPU_GEM_CREATE_EXPLICIT_SYNC))



		return -EINVAL;



	/* reject invalid gem domains */

drivers/gpu/drm/amd/amdgpu/amdgpu_object.h

+8 −0
Original line number Diff line number Diff line
@@ -193,6 +193,14 @@ static inline bool amdgpu_bo_gpu_accessible(struct amdgpu_bo *bo) 
	}

}



/**

 * amdgpu_bo_explicit_sync - return whether the bo is explicitly synced

 */

static inline bool amdgpu_bo_explicit_sync(struct amdgpu_bo *bo)

{

	return bo->flags & AMDGPU_GEM_CREATE_EXPLICIT_SYNC;

}



int amdgpu_bo_create(struct amdgpu_device *adev,

			    unsigned long size, int byte_align,

			    bool kernel, u32 domain, u64 flags,

drivers/gpu/drm/amd/amdgpu/amdgpu_sync.c

+5 −2
Original line number Diff line number Diff line
@@ -169,14 +169,14 @@ int amdgpu_sync_fence(struct amdgpu_device *adev, struct amdgpu_sync *sync, 
 *

 * @sync: sync object to add fences from reservation object to

 * @resv: reservation object with embedded fence

 * @shared: true if we should only sync to the exclusive fence

 * @explicit_sync: true if we should only sync to the exclusive fence

 *

 * Sync to the fence

 */

int amdgpu_sync_resv(struct amdgpu_device *adev,

		     struct amdgpu_sync *sync,

		     struct reservation_object *resv,

		     void *owner)

		     void *owner, bool explicit_sync)

{

	struct reservation_object_list *flist;

	struct dma_fence *f;
@@ -191,6 +191,9 @@ int amdgpu_sync_resv(struct amdgpu_device *adev, 
	f = reservation_object_get_excl(resv);

	r = amdgpu_sync_fence(adev, sync, f);



	if (explicit_sync)

		return r;



	flist = reservation_object_get_list(resv);

	if (!flist || r)

		return r;

drivers/gpu/drm/amd/amdgpu/amdgpu_sync.h

+2 −1
Original line number Diff line number Diff line
@@ -45,7 +45,8 @@ int amdgpu_sync_fence(struct amdgpu_device *adev, struct amdgpu_sync *sync, 
int amdgpu_sync_resv(struct amdgpu_device *adev,

		     struct amdgpu_sync *sync,

		     struct reservation_object *resv,

		     void *owner);

		     void *owner,

		     bool explicit_sync);

struct dma_fence *amdgpu_sync_peek_fence(struct amdgpu_sync *sync,

				     struct amdgpu_ring *ring);

struct dma_fence *amdgpu_sync_get_fence(struct amdgpu_sync *sync);