Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 1764f808 authored by Geert Uytterhoeven's avatar Geert Uytterhoeven Committed by Simon Horman
Browse files

ARM: dts: r8a7794: Add DU1 clock to device tree



Add the missing module clock for the second channel of the display unit.

Signed-off-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
Acked-by: default avatarLaurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: default avatarSimon Horman <horms+renesas@verge.net.au>
parent 3932197c
Loading
Loading
Loading
Loading
+5 −3
Original line number Diff line number Diff line
@@ -1270,19 +1270,21 @@
			clocks = <&mp_clk>, <&hp_clk>,
				 <&zs_clk>, <&p_clk>, <&p_clk>, <&zs_clk>,
				 <&zs_clk>, <&p_clk>, <&p_clk>, <&p_clk>, <&p_clk>,
				 <&zx_clk>;
				 <&zx_clk>, <&zx_clk>;
			#clock-cells = <1>;
			clock-indices = <
				R8A7794_CLK_EHCI R8A7794_CLK_HSUSB
				R8A7794_CLK_HSCIF2 R8A7794_CLK_SCIF5
				R8A7794_CLK_SCIF4 R8A7794_CLK_HSCIF1 R8A7794_CLK_HSCIF0
				R8A7794_CLK_SCIF3 R8A7794_CLK_SCIF2 R8A7794_CLK_SCIF1
				R8A7794_CLK_SCIF0 R8A7794_CLK_DU0
				R8A7794_CLK_SCIF0
				R8A7794_CLK_DU1 R8A7794_CLK_DU0
			>;
			clock-output-names =
				"ehci", "hsusb",
				"hscif2", "scif5", "scif4", "hscif1", "hscif0",
				"scif3", "scif2", "scif1", "scif0", "du0";
				"scif3", "scif2", "scif1", "scif0",
				"du1", "du0";
		};
		mstp8_clks: mstp8_clks@e6150990 {
			compatible = "renesas,r8a7794-mstp-clocks", "renesas,cpg-mstp-clocks";
+1 −0
Original line number Diff line number Diff line
@@ -82,6 +82,7 @@
#define R8A7794_CLK_SCIF2		19
#define R8A7794_CLK_SCIF1		20
#define R8A7794_CLK_SCIF0		21
#define R8A7794_CLK_DU1			23
#define R8A7794_CLK_DU0			24

/* MSTP8 */