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Commit 16ef53a9 authored by Hauke Mehrtens's avatar Hauke Mehrtens Committed by Ben Skeggs
Browse files

drm/nouveau/disp: activate dual link TMDS links only when possible 



Without this patch a pixel clock rate above 165 MHz on a TMDS link is
assumed to be dual link. This is true for DVI, but not for HDMI. HDMI
supports no dual link, but it supports pixel clock rates above 165 MHz.
Only activate Dual Link mode when it is actually possible and requested.

Signed-off-by: default avatarHauke Mehrtens <hauke@hauke-m.de>
[imirkin: check for hdmi monitor for computing proto, use sor ctrl to
 enable extra config bit]
Signed-off-by: default avatarIlia Mirkin <imirkin@alum.mit.edu>
Signed-off-by: default avatarBen Skeggs <bskeggs@redhat.com>
parent c11b8989

drivers/gpu/drm/nouveau/nv50_display.c

+11 −4
Original line number Diff line number Diff line
@@ -1962,10 +1962,17 @@ nv50_sor_mode_set(struct drm_encoder *encoder, struct drm_display_mode *umode, 
	switch (nv_encoder->dcb->type) {

	case DCB_OUTPUT_TMDS:

		if (nv_encoder->dcb->sorconf.link & 1) {

			if (mode->clock < 165000)

			proto = 0x1;

			else

				proto = 0x5;

			/* Only enable dual-link if:

			 *  - Need to (i.e. rate > 165MHz)

			 *  - DCB says we can

			 *  - Not an HDMI monitor, since there's no dual-link

			 *    on HDMI.

			 */

			if (mode->clock >= 165000 &&

			    nv_encoder->dcb->duallink_possible &&

			    !drm_detect_hdmi_monitor(nv_connector->edid))

				proto |= 0x4;

		} else {

			proto = 0x2;

		}

drivers/gpu/drm/nouveau/nvkm/engine/disp/gf119.c

+1 −1
Original line number Diff line number Diff line
@@ -158,7 +158,7 @@ exec_clkcmp(struct nv50_disp *disp, int head, int id, u32 pclk, u32 *conf) 
	switch (outp->info.type) {

	case DCB_OUTPUT_TMDS:

		*conf = (ctrl & 0x00000f00) >> 8;

		if (pclk >= 165000)

		if (*conf == 5)

			*conf |= 0x0100;

		break;

	case DCB_OUTPUT_LVDS:

drivers/gpu/drm/nouveau/nvkm/engine/disp/nv50.c

+1 −1
Original line number Diff line number Diff line
@@ -391,7 +391,7 @@ exec_clkcmp(struct nv50_disp *disp, int head, int id, u32 pclk, u32 *conf) 
		switch (outp->info.type) {

		case DCB_OUTPUT_TMDS:

			*conf = (ctrl & 0x00000f00) >> 8;

			if (pclk >= 165000)

			if (*conf == 5)

				*conf |= 0x0100;

			break;

		case DCB_OUTPUT_LVDS: