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Commit 16c10203 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge branch 'devel-stable' of master.kernel.org:/home/rmk/linux-2.6-arm 

* 'devel-stable' of master.kernel.org:/home/rmk/linux-2.6-arm: (161 commits)
  ARM: pxa: fix building issue of missing physmap.h
  ARM: mmp: PXA910 drive strength FAST using wrong value
  ARM: mmp: MMP2 drive strength FAST using wrong value
  ARM: pxa: fix recursive calls in pxa_low_gpio_chip
  AT91: Support for gsia18s board
  AT91: Acme Systems FOX Board G20 board files
  AT91: board-sam9m10g45ek.c: Remove duplicate inclusion of mach/hardware.h
  ARM: pxa: fix suspend/resume array index miscalculation
  ARM: pxa: use cpu_has_ipr() consistently in irq.c
  ARM: pxa: remove unused variable in clock-pxa3xx.c
  ARM: pxa: fix warning in zeus.c
  ARM: sa1111: fix typo in sa1111_retrigger_lowirq()
  ARM mxs: clkdev related compile fixes
  ARM i.MX mx31_3ds: Fix MC13783 regulator names
  ARM: plat-stmp3xxx: irq_data conversion.
  ARM: plat-spear: irq_data conversion.
  ARM: plat-orion: irq_data conversion.
  ARM: plat-omap: irq_data conversion.
  ARM: plat-nomadik: irq_data conversion.
  ARM: plat-mxc: irq_data conversion.
  ...

Fix up trivial conflict in arch/arm/plat-omap/gpio.c (Lennert
Buytenhek's irq_data conversion clashing with some omap irq updates)
parents 65e5d002 bbba7560

arch/arm/Kconfig

+4 −17
Original line number Diff line number Diff line
@@ -26,6 +26,8 @@ config ARM 
	select HAVE_REGS_AND_STACK_ACCESS_API

	select HAVE_HW_BREAKPOINT if (PERF_EVENTS && (CPU_V6 || CPU_V7))

	select HAVE_C_RECORDMCOUNT

	select HAVE_GENERIC_HARDIRQS

	select HAVE_SPARSE_IRQ

	help

	  The ARM series is a line of low-power-consumption RISC chip designs

	  licensed by ARM Ltd and targeted at embedded applications and
@@ -97,10 +99,6 @@ config MCA 
	  <file:Documentation/mca.txt> (and especially the web page given

	  there) before attempting to build an MCA bus kernel.



config GENERIC_HARDIRQS

	bool

	default y



config STACKTRACE_SUPPORT

	bool

	default y
@@ -180,9 +178,6 @@ config FIQ 
config ARCH_MTD_XIP

	bool



config GENERIC_HARDIRQS_NO__DO_IRQ

	def_bool y



config ARM_L1_CACHE_SHIFT_6

	bool

	help
@@ -368,7 +363,7 @@ config ARCH_MXS 
	bool "Freescale MXS-based"

	select GENERIC_CLOCKEVENTS

	select ARCH_REQUIRE_GPIOLIB

	select COMMON_CLKDEV

	select CLKDEV_LOOKUP

	help

	  Support for Freescale MXS-based family of processors
@@ -771,6 +766,7 @@ config ARCH_S5PV310 
	select ARCH_SPARSEMEM_ENABLE

	select GENERIC_GPIO

	select HAVE_CLK

	select ARCH_HAS_CPUFREQ

	select GENERIC_CLOCKEVENTS

	select HAVE_S3C_RTC if RTC_CLASS

	select HAVE_S3C2410_I2C if I2C
@@ -1452,15 +1448,6 @@ config HW_PERF_EVENTS 
	  Enable hardware performance counter support for perf events. If

	  disabled, perf events will use software events only.



config SPARSE_IRQ

	def_bool n

	help

	  This enables support for sparse irqs. This is useful in general

	  as most CPUs have a fairly sparse array of IRQ vectors, which

	  the irq_desc then maps directly on to. Systems with a high

	  number of off-chip IRQs will want to treat this as

	  experimental until they have been independently verified.



source "mm/Kconfig"



config FORCE_MAX_ZONEORDER

arch/arm/common/gic.c

+33 −33
Original line number Diff line number Diff line
@@ -50,57 +50,56 @@ struct gic_chip_data { 


static struct gic_chip_data gic_data[MAX_GIC_NR] __read_mostly;



static inline void __iomem *gic_dist_base(unsigned int irq)

static inline void __iomem *gic_dist_base(struct irq_data *d)

{

	struct gic_chip_data *gic_data = get_irq_chip_data(irq);

	struct gic_chip_data *gic_data = irq_data_get_irq_chip_data(d);

	return gic_data->dist_base;

}



static inline void __iomem *gic_cpu_base(unsigned int irq)

static inline void __iomem *gic_cpu_base(struct irq_data *d)

{

	struct gic_chip_data *gic_data = get_irq_chip_data(irq);

	struct gic_chip_data *gic_data = irq_data_get_irq_chip_data(d);

	return gic_data->cpu_base;

}



static inline unsigned int gic_irq(unsigned int irq)

static inline unsigned int gic_irq(struct irq_data *d)

{

	struct gic_chip_data *gic_data = get_irq_chip_data(irq);

	return irq - gic_data->irq_offset;

	struct gic_chip_data *gic_data = irq_data_get_irq_chip_data(d);

	return d->irq - gic_data->irq_offset;

}



/*

 * Routines to acknowledge, disable and enable interrupts

 */

static void gic_ack_irq(unsigned int irq)

static void gic_ack_irq(struct irq_data *d)

{



	spin_lock(&irq_controller_lock);

	writel(gic_irq(irq), gic_cpu_base(irq) + GIC_CPU_EOI);

	writel(gic_irq(d), gic_cpu_base(d) + GIC_CPU_EOI);

	spin_unlock(&irq_controller_lock);

}



static void gic_mask_irq(unsigned int irq)

static void gic_mask_irq(struct irq_data *d)

{

	u32 mask = 1 << (irq % 32);

	u32 mask = 1 << (d->irq % 32);



	spin_lock(&irq_controller_lock);

	writel(mask, gic_dist_base(irq) + GIC_DIST_ENABLE_CLEAR + (gic_irq(irq) / 32) * 4);

	writel(mask, gic_dist_base(d) + GIC_DIST_ENABLE_CLEAR + (gic_irq(d) / 32) * 4);

	spin_unlock(&irq_controller_lock);

}



static void gic_unmask_irq(unsigned int irq)

static void gic_unmask_irq(struct irq_data *d)

{

	u32 mask = 1 << (irq % 32);

	u32 mask = 1 << (d->irq % 32);



	spin_lock(&irq_controller_lock);

	writel(mask, gic_dist_base(irq) + GIC_DIST_ENABLE_SET + (gic_irq(irq) / 32) * 4);

	writel(mask, gic_dist_base(d) + GIC_DIST_ENABLE_SET + (gic_irq(d) / 32) * 4);

	spin_unlock(&irq_controller_lock);

}



static int gic_set_type(unsigned int irq, unsigned int type)

static int gic_set_type(struct irq_data *d, unsigned int type)

{

	void __iomem *base = gic_dist_base(irq);

	unsigned int gicirq = gic_irq(irq);

	void __iomem *base = gic_dist_base(d);

	unsigned int gicirq = gic_irq(d);

	u32 enablemask = 1 << (gicirq % 32);

	u32 enableoff = (gicirq / 32) * 4;

	u32 confmask = 0x2 << ((gicirq % 16) * 2);
@@ -143,21 +142,22 @@ static int gic_set_type(unsigned int irq, unsigned int type) 
}



#ifdef CONFIG_SMP

static int gic_set_cpu(unsigned int irq, const struct cpumask *mask_val)

static int

gic_set_cpu(struct irq_data *d, const struct cpumask *mask_val, bool force)

{

	void __iomem *reg = gic_dist_base(irq) + GIC_DIST_TARGET + (gic_irq(irq) & ~3);

	unsigned int shift = (irq % 4) * 8;

	void __iomem *reg = gic_dist_base(d) + GIC_DIST_TARGET + (gic_irq(d) & ~3);

	unsigned int shift = (d->irq % 4) * 8;

	unsigned int cpu = cpumask_first(mask_val);

	u32 val;

	struct irq_desc *desc;



	spin_lock(&irq_controller_lock);

	desc = irq_to_desc(irq);

	desc = irq_to_desc(d->irq);

	if (desc == NULL) {

		spin_unlock(&irq_controller_lock);

		return -EINVAL;

	}

	desc->node = cpu;

	d->node = cpu;

	val = readl(reg) & ~(0xff << shift);

	val |= 1 << (cpu + shift);

	writel(val, reg);
@@ -175,7 +175,7 @@ static void gic_handle_cascade_irq(unsigned int irq, struct irq_desc *desc) 
	unsigned long status;



	/* primary controller ack'ing */

	chip->ack(irq);

	chip->irq_ack(&desc->irq_data);



	spin_lock(&irq_controller_lock);

	status = readl(chip_data->cpu_base + GIC_CPU_INTACK);
@@ -193,17 +193,17 @@ static void gic_handle_cascade_irq(unsigned int irq, struct irq_desc *desc) 


 out:

	/* primary controller unmasking */

	chip->unmask(irq);

	chip->irq_unmask(&desc->irq_data);

}



static struct irq_chip gic_chip = {

	.name			= "GIC",

	.ack		= gic_ack_irq,

	.mask		= gic_mask_irq,

	.unmask		= gic_unmask_irq,

	.set_type	= gic_set_type,

	.irq_ack		= gic_ack_irq,

	.irq_mask		= gic_mask_irq,

	.irq_unmask		= gic_unmask_irq,

	.irq_set_type		= gic_set_type,

#ifdef CONFIG_SMP

	.set_affinity	= gic_set_cpu,

	.irq_set_affinity	= gic_set_cpu,

#endif

};
@@ -337,7 +337,7 @@ void __cpuinit gic_enable_ppi(unsigned int irq) 


	local_irq_save(flags);

	irq_to_desc(irq)->status |= IRQ_NOPROBE;

	gic_unmask_irq(irq);

	gic_unmask_irq(irq_get_irq_data(irq));

	local_irq_restore(flags);

}

arch/arm/common/it8152.c

+9 −5
Original line number Diff line number Diff line
@@ -31,8 +31,10 @@ 


#define MAX_SLOTS		21



static void it8152_mask_irq(unsigned int irq)

static void it8152_mask_irq(struct irq_data *d)

{

	unsigned int irq = d->irq;



       if (irq >= IT8152_LD_IRQ(0)) {

	       __raw_writel((__raw_readl(IT8152_INTC_LDCNIMR) |

			    (1 << (irq - IT8152_LD_IRQ(0)))),
@@ -48,8 +50,10 @@ static void it8152_mask_irq(unsigned int irq) 
       }

}



static void it8152_unmask_irq(unsigned int irq)

static void it8152_unmask_irq(struct irq_data *d)

{

	unsigned int irq = d->irq;



       if (irq >= IT8152_LD_IRQ(0)) {

	       __raw_writel((__raw_readl(IT8152_INTC_LDCNIMR) &

			     ~(1 << (irq - IT8152_LD_IRQ(0)))),
@@ -67,9 +71,9 @@ static void it8152_unmask_irq(unsigned int irq) 


static struct irq_chip it8152_irq_chip = {

	.name		= "it8152",

	.ack		= it8152_mask_irq,

	.mask		= it8152_mask_irq,

	.unmask		= it8152_unmask_irq,

	.irq_ack	= it8152_mask_irq,

	.irq_mask	= it8152_mask_irq,

	.irq_unmask	= it8152_unmask_irq,

};



void it8152_init_irq(void)

arch/arm/common/locomo.c

+12 −12
Original line number Diff line number Diff line
@@ -144,7 +144,7 @@ static void locomo_handler(unsigned int irq, struct irq_desc *desc) 
	int req, i;



	/* Acknowledge the parent IRQ */

	desc->chip->ack(irq);

	desc->irq_data.chip->irq_ack(&desc->irq_data);



	/* check why this interrupt was generated */

	req = locomo_readl(lchip->base + LOCOMO_ICR) & 0x0f00;
@@ -161,33 +161,33 @@ static void locomo_handler(unsigned int irq, struct irq_desc *desc) 
	}

}



static void locomo_ack_irq(unsigned int irq)

static void locomo_ack_irq(struct irq_data *d)

{

}



static void locomo_mask_irq(unsigned int irq)

static void locomo_mask_irq(struct irq_data *d)

{

	struct locomo *lchip = get_irq_chip_data(irq);

	struct locomo *lchip = irq_data_get_irq_chip_data(d);

	unsigned int r;

	r = locomo_readl(lchip->base + LOCOMO_ICR);

	r &= ~(0x0010 << (irq - lchip->irq_base));

	r &= ~(0x0010 << (d->irq - lchip->irq_base));

	locomo_writel(r, lchip->base + LOCOMO_ICR);

}



static void locomo_unmask_irq(unsigned int irq)

static void locomo_unmask_irq(struct irq_data *d)

{

	struct locomo *lchip = get_irq_chip_data(irq);

	struct locomo *lchip = irq_data_get_irq_chip_data(d);

	unsigned int r;

	r = locomo_readl(lchip->base + LOCOMO_ICR);

	r |= (0x0010 << (irq - lchip->irq_base));

	r |= (0x0010 << (d->irq - lchip->irq_base));

	locomo_writel(r, lchip->base + LOCOMO_ICR);

}



static struct irq_chip locomo_chip = {

	.name		= "LOCOMO",

	.ack	= locomo_ack_irq,

	.mask	= locomo_mask_irq,

	.unmask	= locomo_unmask_irq,

	.irq_ack	= locomo_ack_irq,

	.irq_mask	= locomo_mask_irq,

	.irq_unmask	= locomo_unmask_irq,

};



static void locomo_setup_irq(struct locomo *lchip)

arch/arm/common/sa1111.c

+48 −48
Original line number Diff line number Diff line
@@ -210,7 +210,7 @@ sa1111_irq_handler(unsigned int irq, struct irq_desc *desc) 


	sa1111_writel(stat0, mapbase + SA1111_INTSTATCLR0);



	desc->chip->ack(irq);

	desc->irq_data.chip->irq_ack(&desc->irq_data);



	sa1111_writel(stat1, mapbase + SA1111_INTSTATCLR1);
@@ -228,35 +228,35 @@ sa1111_irq_handler(unsigned int irq, struct irq_desc *desc) 
			generic_handle_irq(i + sachip->irq_base);



	/* For level-based interrupts */

	desc->chip->unmask(irq);

	desc->irq_data.chip->irq_unmask(&desc->irq_data);

}



#define SA1111_IRQMASK_LO(x)	(1 << (x - sachip->irq_base))

#define SA1111_IRQMASK_HI(x)	(1 << (x - sachip->irq_base - 32))



static void sa1111_ack_irq(unsigned int irq)

static void sa1111_ack_irq(struct irq_data *d)

{

}



static void sa1111_mask_lowirq(unsigned int irq)

static void sa1111_mask_lowirq(struct irq_data *d)

{

	struct sa1111 *sachip = get_irq_chip_data(irq);

	struct sa1111 *sachip = irq_data_get_irq_chip_data(d);

	void __iomem *mapbase = sachip->base + SA1111_INTC;

	unsigned long ie0;



	ie0 = sa1111_readl(mapbase + SA1111_INTEN0);

	ie0 &= ~SA1111_IRQMASK_LO(irq);

	ie0 &= ~SA1111_IRQMASK_LO(d->irq);

	writel(ie0, mapbase + SA1111_INTEN0);

}



static void sa1111_unmask_lowirq(unsigned int irq)

static void sa1111_unmask_lowirq(struct irq_data *d)

{

	struct sa1111 *sachip = get_irq_chip_data(irq);

	struct sa1111 *sachip = irq_data_get_irq_chip_data(d);

	void __iomem *mapbase = sachip->base + SA1111_INTC;

	unsigned long ie0;



	ie0 = sa1111_readl(mapbase + SA1111_INTEN0);

	ie0 |= SA1111_IRQMASK_LO(irq);

	ie0 |= SA1111_IRQMASK_LO(d->irq);

	sa1111_writel(ie0, mapbase + SA1111_INTEN0);

}
@@ -267,11 +267,11 @@ static void sa1111_unmask_lowirq(unsigned int irq) 
 * be triggered.  In fact, its very difficult, if not impossible to get

 * INTSET to re-trigger the interrupt.

 */

static int sa1111_retrigger_lowirq(unsigned int irq)

static int sa1111_retrigger_lowirq(struct irq_data *d)

{

	struct sa1111 *sachip = get_irq_chip_data(irq);

	struct sa1111 *sachip = irq_data_get_irq_chip_data(d);

	void __iomem *mapbase = sachip->base + SA1111_INTC;

	unsigned int mask = SA1111_IRQMASK_LO(irq);

	unsigned int mask = SA1111_IRQMASK_LO(d->irq);

	unsigned long ip0;

	int i;
@@ -279,21 +279,21 @@ static int sa1111_retrigger_lowirq(unsigned int irq) 
	for (i = 0; i < 8; i++) {

		sa1111_writel(ip0 ^ mask, mapbase + SA1111_INTPOL0);

		sa1111_writel(ip0, mapbase + SA1111_INTPOL0);

		if (sa1111_readl(mapbase + SA1111_INTSTATCLR1) & mask)

		if (sa1111_readl(mapbase + SA1111_INTSTATCLR0) & mask)

			break;

	}



	if (i == 8)

		printk(KERN_ERR "Danger Will Robinson: failed to "

			"re-trigger IRQ%d\n", irq);

			"re-trigger IRQ%d\n", d->irq);

	return i == 8 ? -1 : 0;

}



static int sa1111_type_lowirq(unsigned int irq, unsigned int flags)

static int sa1111_type_lowirq(struct irq_data *d, unsigned int flags)

{

	struct sa1111 *sachip = get_irq_chip_data(irq);

	struct sa1111 *sachip = irq_data_get_irq_chip_data(d);

	void __iomem *mapbase = sachip->base + SA1111_INTC;

	unsigned int mask = SA1111_IRQMASK_LO(irq);

	unsigned int mask = SA1111_IRQMASK_LO(d->irq);

	unsigned long ip0;



	if (flags == IRQ_TYPE_PROBE)
@@ -313,11 +313,11 @@ static int sa1111_type_lowirq(unsigned int irq, unsigned int flags) 
	return 0;

}



static int sa1111_wake_lowirq(unsigned int irq, unsigned int on)

static int sa1111_wake_lowirq(struct irq_data *d, unsigned int on)

{

	struct sa1111 *sachip = get_irq_chip_data(irq);

	struct sa1111 *sachip = irq_data_get_irq_chip_data(d);

	void __iomem *mapbase = sachip->base + SA1111_INTC;

	unsigned int mask = SA1111_IRQMASK_LO(irq);

	unsigned int mask = SA1111_IRQMASK_LO(d->irq);

	unsigned long we0;



	we0 = sa1111_readl(mapbase + SA1111_WAKEEN0);
@@ -332,33 +332,33 @@ static int sa1111_wake_lowirq(unsigned int irq, unsigned int on) 


static struct irq_chip sa1111_low_chip = {

	.name		= "SA1111-l",

	.ack		= sa1111_ack_irq,

	.mask		= sa1111_mask_lowirq,

	.unmask		= sa1111_unmask_lowirq,

	.retrigger	= sa1111_retrigger_lowirq,

	.set_type	= sa1111_type_lowirq,

	.set_wake	= sa1111_wake_lowirq,

	.irq_ack	= sa1111_ack_irq,

	.irq_mask	= sa1111_mask_lowirq,

	.irq_unmask	= sa1111_unmask_lowirq,

	.irq_retrigger	= sa1111_retrigger_lowirq,

	.irq_set_type	= sa1111_type_lowirq,

	.irq_set_wake	= sa1111_wake_lowirq,

};



static void sa1111_mask_highirq(unsigned int irq)

static void sa1111_mask_highirq(struct irq_data *d)

{

	struct sa1111 *sachip = get_irq_chip_data(irq);

	struct sa1111 *sachip = irq_data_get_irq_chip_data(d);

	void __iomem *mapbase = sachip->base + SA1111_INTC;

	unsigned long ie1;



	ie1 = sa1111_readl(mapbase + SA1111_INTEN1);

	ie1 &= ~SA1111_IRQMASK_HI(irq);

	ie1 &= ~SA1111_IRQMASK_HI(d->irq);

	sa1111_writel(ie1, mapbase + SA1111_INTEN1);

}



static void sa1111_unmask_highirq(unsigned int irq)

static void sa1111_unmask_highirq(struct irq_data *d)

{

	struct sa1111 *sachip = get_irq_chip_data(irq);

	struct sa1111 *sachip = irq_data_get_irq_chip_data(d);

	void __iomem *mapbase = sachip->base + SA1111_INTC;

	unsigned long ie1;



	ie1 = sa1111_readl(mapbase + SA1111_INTEN1);

	ie1 |= SA1111_IRQMASK_HI(irq);

	ie1 |= SA1111_IRQMASK_HI(d->irq);

	sa1111_writel(ie1, mapbase + SA1111_INTEN1);

}
@@ -369,11 +369,11 @@ static void sa1111_unmask_highirq(unsigned int irq) 
 * be triggered.  In fact, its very difficult, if not impossible to get

 * INTSET to re-trigger the interrupt.

 */

static int sa1111_retrigger_highirq(unsigned int irq)

static int sa1111_retrigger_highirq(struct irq_data *d)

{

	struct sa1111 *sachip = get_irq_chip_data(irq);

	struct sa1111 *sachip = irq_data_get_irq_chip_data(d);

	void __iomem *mapbase = sachip->base + SA1111_INTC;

	unsigned int mask = SA1111_IRQMASK_HI(irq);

	unsigned int mask = SA1111_IRQMASK_HI(d->irq);

	unsigned long ip1;

	int i;
@@ -387,15 +387,15 @@ static int sa1111_retrigger_highirq(unsigned int irq) 


	if (i == 8)

		printk(KERN_ERR "Danger Will Robinson: failed to "

			"re-trigger IRQ%d\n", irq);

			"re-trigger IRQ%d\n", d->irq);

	return i == 8 ? -1 : 0;

}



static int sa1111_type_highirq(unsigned int irq, unsigned int flags)

static int sa1111_type_highirq(struct irq_data *d, unsigned int flags)

{

	struct sa1111 *sachip = get_irq_chip_data(irq);

	struct sa1111 *sachip = irq_data_get_irq_chip_data(d);

	void __iomem *mapbase = sachip->base + SA1111_INTC;

	unsigned int mask = SA1111_IRQMASK_HI(irq);

	unsigned int mask = SA1111_IRQMASK_HI(d->irq);

	unsigned long ip1;



	if (flags == IRQ_TYPE_PROBE)
@@ -415,11 +415,11 @@ static int sa1111_type_highirq(unsigned int irq, unsigned int flags) 
	return 0;

}



static int sa1111_wake_highirq(unsigned int irq, unsigned int on)

static int sa1111_wake_highirq(struct irq_data *d, unsigned int on)

{

	struct sa1111 *sachip = get_irq_chip_data(irq);

	struct sa1111 *sachip = irq_data_get_irq_chip_data(d);

	void __iomem *mapbase = sachip->base + SA1111_INTC;

	unsigned int mask = SA1111_IRQMASK_HI(irq);

	unsigned int mask = SA1111_IRQMASK_HI(d->irq);

	unsigned long we1;



	we1 = sa1111_readl(mapbase + SA1111_WAKEEN1);
@@ -434,12 +434,12 @@ static int sa1111_wake_highirq(unsigned int irq, unsigned int on) 


static struct irq_chip sa1111_high_chip = {

	.name		= "SA1111-h",

	.ack		= sa1111_ack_irq,

	.mask		= sa1111_mask_highirq,

	.unmask		= sa1111_unmask_highirq,

	.retrigger	= sa1111_retrigger_highirq,

	.set_type	= sa1111_type_highirq,

	.set_wake	= sa1111_wake_highirq,

	.irq_ack	= sa1111_ack_irq,

	.irq_mask	= sa1111_mask_highirq,

	.irq_unmask	= sa1111_unmask_highirq,

	.irq_retrigger	= sa1111_retrigger_highirq,

	.irq_set_type	= sa1111_type_highirq,

	.irq_set_wake	= sa1111_wake_highirq,

};



static void sa1111_setup_irq(struct sa1111 *sachip)