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Commit 163cb4b8 authored by Pranav Patel's avatar Pranav Patel
Browse files

ARM: dts: msm: Add GPU powerlevel bins support for scuba 

Initial change to enable different fmaxs for scuba GPU.

Change-Id: I9d7564e47e9d00d7f183180aa74625555fd611db
parent 44dad1cb

qcom/scuba-gpu.dtsi

+270 −66
Original line number Diff line number Diff line
@@ -165,6 +165,9 @@ 
		/* Context aware jump target power level */

		qcom,ca-target-pwrlevel = <5>;



		nvmem-cells = <&gpu_speed_bin>;

		nvmem-cell-names = "speed_bin";



		/* GPU Mempools */

		qcom,gpu-mempools {

			#address-cells = <1>;
@@ -197,13 +200,27 @@ 
			};

		};



		/* Power Levels */

		qcom,gpu-pwrlevels {

		/* Power Levels

		 * Speed-bin zero is default speed bin.

		 * For rest of the speed bins, speed-bin value

		 * is calculated as FMAX/4.8 MHz round up to zero

		 * decimal places plus two margin to account for

		 * clock jitters.

		 */

		qcom,gpu-pwrlevel-bins {

			#address-cells = <1>;

			#size-cells = <0>;



			compatible = "qcom,gpu-pwrlevel-bins";



			qcom,gpu-pwrlevels-0 {

				#address-cells = <1>;

				#size-cells = <0>;



			compatible = "qcom,gpu-pwrlevels";

				qcom,speed-bin = <0>;



				qcom,initial-pwrlevel = <6>;

				qcom,ca-target-pwrlevel = <5>;

				/* TURBO_L1 */

				qcom,gpu-pwrlevel@0 {

					reg = <0>;
@@ -218,7 +235,7 @@ 
					reg = <1>;

					qcom,gpu-freq = <1017600000>;

					qcom,bus-freq = <11>;

				qcom,bus-min = <9>;

					qcom,bus-min = <10>;

					qcom,bus-max = <11>;

				};
@@ -227,7 +244,7 @@ 
					reg = <2>;

					qcom,gpu-freq = <921600000>;

					qcom,bus-freq = <10>;

				qcom,bus-min = <9>;

					qcom,bus-min = <10>;

					qcom,bus-max = <11>;

				};
@@ -245,7 +262,7 @@ 
					reg = <4>;

					qcom,gpu-freq = <672000000>;

					qcom,bus-freq = <8>;

				qcom,bus-min = <7>;

					qcom,bus-min = <8>;

					qcom,bus-max = <9>;

				};
@@ -276,6 +293,193 @@ 
					qcom,bus-max = <0>;

				};

			};



			qcom,gpu-pwrlevels-1 {

				#address-cells = <1>;

				#size-cells = <0>;



				qcom,speed-bin = <236>;



				qcom,initial-pwrlevel = <6>;

				qcom,ca-target-pwrlevel = <5>;



				/* TURBO_L1 */

				qcom,gpu-pwrlevel@0 {

					reg = <0>;

					qcom,gpu-freq = <1123200000>;

					qcom,bus-freq = <11>;

					qcom,bus-min = <10>;

					qcom,bus-max = <11>;

				};



				/* TURBO */

				qcom,gpu-pwrlevel@1 {

					reg = <1>;

					qcom,gpu-freq = <1017600000>;

					qcom,bus-freq = <11>;

					qcom,bus-min = <10>;

					qcom,bus-max = <11>;

				};



				/* NOM_L1 */

				qcom,gpu-pwrlevel@2 {

					reg = <2>;

					qcom,gpu-freq = <921600000>;

					qcom,bus-freq = <10>;

					qcom,bus-min = <10>;

					qcom,bus-max = <11>;

				};



				/* NOM */

				qcom,gpu-pwrlevel@3 {

					reg = <3>;

					qcom,gpu-freq = <844800000>;

					qcom,bus-freq = <9>;

					qcom,bus-min = <8>;

					qcom,bus-max = <10>;

				};



				/* SVS_L1 */

				qcom,gpu-pwrlevel@4 {

					reg = <4>;

					qcom,gpu-freq = <672000000>;

					qcom,bus-freq = <8>;

					qcom,bus-min = <8>;

					qcom,bus-max = <9>;

				};



				/* SVS */

				qcom,gpu-pwrlevel@5 {

					reg = <5>;

					qcom,gpu-freq = <537600000>;

					qcom,bus-freq = <7>;

					qcom,bus-min = <5>;

					qcom,bus-max = <8>;

				};



				/* LOW SVS */

				qcom,gpu-pwrlevel@6 {

					reg = <6>;

					qcom,gpu-freq = <355200000>;

					qcom,bus-freq = <4>;

					qcom,bus-min = <3>;

					qcom,bus-max = <5>;

				};



				/* XO */

				qcom,gpu-pwrlevel@7 {

					reg = <7>;

					qcom,gpu-freq = <0>;

					qcom,bus-freq = <0>;

					qcom,bus-min = <0>;

					qcom,bus-max = <0>;

				};

			};



			qcom,gpu-pwrlevels-2 {

				#address-cells = <1>;

				#size-cells = <0>;



				qcom,speed-bin = <178>;



				qcom,initial-pwrlevel = <3>;

				qcom,ca-target-pwrlevel = <2>;





				/* NOM */

				qcom,gpu-pwrlevel@0 {

					reg = <0>;

					qcom,gpu-freq = <844800000>;

					qcom,bus-freq = <11>;

					qcom,bus-min = <9>;

					qcom,bus-max = <11>;

				};



				/* SVS_L1 */

				qcom,gpu-pwrlevel@1 {

					reg = <1>;

					qcom,gpu-freq = <672000000>;

					qcom,bus-freq = <8>;

					qcom,bus-min = <8>;

					qcom,bus-max = <10>;

				};



				/* SVS */

				qcom,gpu-pwrlevel@2 {

					reg = <2>;

					qcom,gpu-freq = <537600000>;

					qcom,bus-freq = <7>;

					qcom,bus-min = <5>;

					qcom,bus-max = <8>;

				};



				/* LOW SVS */

				qcom,gpu-pwrlevel@3 {

					reg = <3>;

					qcom,gpu-freq = <355200000>;

					qcom,bus-freq = <4>;

					qcom,bus-min = <3>;

					qcom,bus-max = <5>;

				};



				/* XO */

				qcom,gpu-pwrlevel@4 {

					reg = <4>;

					qcom,gpu-freq = <0>;

					qcom,bus-freq = <0>;

					qcom,bus-min = <0>;

					qcom,bus-max = <0>;

				};

			};



			qcom,gpu-pwrlevels-3 {

				#address-cells = <1>;

				#size-cells = <0>;



				qcom,speed-bin = <142>;



				qcom,initial-pwrlevel = <2>;

				qcom,ca-target-pwrlevel = <1>;



				/* SVS_L1 */

				qcom,gpu-pwrlevel@0 {

					reg = <0>;

					qcom,gpu-freq = <672000000>;

					qcom,bus-freq = <11>;

					qcom,bus-min = <8>;

					qcom,bus-max = <11>;

				};



				/* SVS */

				qcom,gpu-pwrlevel@1 {

					reg = <1>;

					qcom,gpu-freq = <537600000>;

					qcom,bus-freq = <7>;

					qcom,bus-min = <5>;

					qcom,bus-max = <9>;

				};



				/* LOW SVS */

				qcom,gpu-pwrlevel@2 {

					reg = <2>;

					qcom,gpu-freq = <355200000>;

					qcom,bus-freq = <4>;

					qcom,bus-min = <3>;

					qcom,bus-max = <5>;

				};



				/* XO */

				qcom,gpu-pwrlevel@3 {

					reg = <3>;

					qcom,gpu-freq = <0>;

					qcom,bus-freq = <0>;

					qcom,bus-min = <0>;

					qcom,bus-max = <0>;

				};

			};





		};

	};



	kgsl_msm_iommu: qcom,kgsl-iommu@59a0000 {

qcom/scuba.dtsi

+5 −0
Original line number Diff line number Diff line
@@ -816,6 +816,11 @@ 
		feat_conf5: feat_conf5@6018 {

			reg = <0x6018 0x4>;

		};



		gpu_speed_bin: gpu_speed_bin@6006 {

			reg = <0x6006 0x2>;

			bits = <5 8>;

		};

	};



	qcom,sps {