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Commit 15d8ffc9 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'mmc-v4.14' of git://git.kernel.org/pub/scm/linux/kernel/git/ulfh/mmc 

Pull MMC updates from Ulf Hansson:
 "MMC core:
   - Continue to refactor the mmc block code to prepare for blkmq
   - Move mmc block debugfs into block module
   - Next step for eMMC CMDQ by adding a new mmc host interface for it
   - Move Kconfig option MMC_DEBUG from core to host
   - Some additional minor improvements

  MMC host:
   - Declare structs as const when applicable
   - Explicitly request exclusive reset control when applicable
   - Improve some error paths and other various cleanups
   - sdhci: Preparations to support SDHCI OMAP
   - sdhci: Improve some PM related code
   - sdhci: Re-factoring and modernizations
   - sdhci-xenon: Add runtime PM and system sleep support
   - sdhci-xenon: Add support for eMMC HS400 Enhanced Strobe
   - sdhci-cadence: Add system sleep support
   - sdhci-of-at91: Improve system sleep support
   - dw_mmc: Add support for Hisilicon hi3660
   - sunxi: Add support for A83T eMMC
   - sunxi: Add support for DDR52 mode
   - meson-gx: Add support for UHS-I SD-cards
   - meson-gx: Cleanups and improvements
   - tmio: Fix CMD12 (STOP) handling
   - tmio: Cleanups and improvements
   - renesas_sdhi: Add r8a7743/5 support
   - renesas-sdhi: Add support for R-Car Gen3 SDHI DMAC
   - renesas_sdhi: Cleanups and improvements"

* tag 'mmc-v4.14' of git://git.kernel.org/pub/scm/linux/kernel/git/ulfh/mmc: (145 commits)
  mmc: renesas_sdhi: Add r8a7743/5 support
  mmc: meson-gx: fix __ffsdi2 undefined on arm32
  mmc: sdhci-xenon: add runtime pm support and reimplement standby
  mmc: core: Move mmc_start_areq() declaration
  mmc: mmci: stop building qcom dml as module
  mmc: sunxi: Reset the device at probe time
  clk: sunxi-ng: Provide a default reset hook
  mmc: meson-gx: rework tuning function
  mmc: meson-gx: change default tx phase
  mmc: meson-gx: implement voltage switch callback
  mmc: meson-gx: use CCF to handle the clock phases
  mmc: meson-gx: implement card_busy callback
  mmc: meson-gx: simplify interrupt handler
  mmc: meson-gx: work around clk-stop issue
  mmc: meson-gx: fix dual data rate mode frequencies
  mmc: meson-gx: rework clock init function
  mmc: meson-gx: rework clk_set function
  mmc: meson-gx: rework set_ios function
  mmc: meson-gx: cfg init overwrite values
  mmc: meson-gx: initialize sane clk default before clock register
  ...
parents a0725ab0 c16a854e

Documentation/devicetree/bindings/mmc/renesas,mmcif.txt

+3 −1
Original line number Diff line number Diff line
@@ -11,6 +11,8 @@ Required properties: 
	- "renesas,mmcif-r7s72100" for the MMCIF found in r7s72100 SoCs

	- "renesas,mmcif-r8a73a4" for the MMCIF found in r8a73a4 SoCs

	- "renesas,mmcif-r8a7740" for the MMCIF found in r8a7740 SoCs

	- "renesas,mmcif-r8a7743" for the MMCIF found in r8a7743 SoCs

	- "renesas,mmcif-r8a7745" for the MMCIF found in r8a7745 SoCs

	- "renesas,mmcif-r8a7778" for the MMCIF found in r8a7778 SoCs

	- "renesas,mmcif-r8a7790" for the MMCIF found in r8a7790 SoCs

	- "renesas,mmcif-r8a7791" for the MMCIF found in r8a7791 SoCs
@@ -21,7 +23,7 @@ Required properties: 
- interrupts: Some SoCs have only 1 shared interrupt, while others have either

  2 or 3 individual interrupts (error, int, card detect). Below is the number

  of interrupts for each SoC:

    1: r8a73a4, r8a7778, r8a7790, r8a7791, r8a7793, r8a7794

    1: r8a73a4, r8a7743, r8a7745, r8a7778, r8a7790, r8a7791, r8a7793, r8a7794

    2: r8a7740, sh73a0

    3: r7s72100

Documentation/devicetree/bindings/mmc/rockchip-dw-mshc.txt

+1 −0
Original line number Diff line number Diff line
@@ -15,6 +15,7 @@ Required Properties: 
	- "rockchip,rk3288-dw-mshc": for Rockchip RK3288

	- "rockchip,rv1108-dw-mshc", "rockchip,rk3288-dw-mshc": for Rockchip RV1108

	- "rockchip,rk3036-dw-mshc", "rockchip,rk3288-dw-mshc": for Rockchip RK3036

	- "rockchip,rk3228-dw-mshc", "rockchip,rk3288-dw-mshc": for Rockchip RK322x

	- "rockchip,rk3328-dw-mshc", "rockchip,rk3288-dw-mshc": for Rockchip RK3328

	- "rockchip,rk3368-dw-mshc", "rockchip,rk3288-dw-mshc": for Rockchip RK3368

	- "rockchip,rk3399-dw-mshc", "rockchip,rk3288-dw-mshc": for Rockchip RK3399

Documentation/devicetree/bindings/mmc/sunxi-mmc.txt

+1 −0
Original line number Diff line number Diff line
@@ -12,6 +12,7 @@ Required properties: 
   * "allwinner,sun4i-a10-mmc"

   * "allwinner,sun5i-a13-mmc"

   * "allwinner,sun7i-a20-mmc"

   * "allwinner,sun8i-a83t-emmc"

   * "allwinner,sun9i-a80-mmc"

   * "allwinner,sun50i-a64-emmc"

   * "allwinner,sun50i-a64-mmc"

Documentation/devicetree/bindings/mmc/tmio_mmc.txt

+4 −4
Original line number Diff line number Diff line
@@ -15,6 +15,8 @@ Required properties: 
		"renesas,sdhi-r7s72100" - SDHI IP on R7S72100 SoC

		"renesas,sdhi-r8a73a4" - SDHI IP on R8A73A4 SoC

		"renesas,sdhi-r8a7740" - SDHI IP on R8A7740 SoC

		"renesas,sdhi-r8a7743" - SDHI IP on R8A7743 SoC

		"renesas,sdhi-r8a7745" - SDHI IP on R8A7745 SoC

		"renesas,sdhi-r8a7778" - SDHI IP on R8A7778 SoC

		"renesas,sdhi-r8a7779" - SDHI IP on R8A7779 SoC

		"renesas,sdhi-r8a7790" - SDHI IP on R8A7790 SoC
@@ -33,9 +35,7 @@ Required properties: 
	  If 2 clocks are specified by the hardware, you must name them as

	  "core" and "cd". If the controller only has 1 clock, naming is not

	  required.

	  Below is the number clocks for each supported SoC:

	   1: SH73A0, R8A73A4, R8A7740, R8A7778, R8A7779, R8A7790

	      R8A7791, R8A7792, R8A7793, R8A7794, R8A7795, R8A7796

	  Devices which have more than 1 clock are listed below:

	  2: R7S72100



Optional properties:

arch/arc/boot/dts/axs10x_mb.dtsi

+0 −1
Original line number Diff line number Diff line
@@ -101,7 +101,6 @@ 
		mmc@0x15000 {

			compatible = "altr,socfpga-dw-mshc";

			reg = < 0x15000 0x400 >;

			num-slots = < 1 >;

			fifo-depth = < 16 >;

			card-detect-delay = < 200 >;

			clocks = <&apbclk>, <&mmcclk>;