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Commit 15d72fd7 authored by Monk Liu's avatar Monk Liu Committed by Alex Deucher
Browse files

drm/amdgpu:impl RREG32 no kiq version 



some registers are PF & VF copy, and we can safely use
mmio method to access them.

and sometime we are forbid to use kiq to access registers
for example in INTR context.

we need a MACRO that always disable KIQ for regs accessing

Signed-off-by: default avatarMonk Liu <Monk.Liu@amd.com>
Reviewed-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Reviewed-by: default avatarXiangliang Yu <Xiangliang.Yu@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent b85c9d2a

drivers/gpu/drm/amd/amdgpu/amdgpu.h

+14 −7
Original line number Diff line number Diff line
@@ -1505,9 +1505,9 @@ void amdgpu_device_fini(struct amdgpu_device *adev); 
int amdgpu_gpu_wait_for_idle(struct amdgpu_device *adev);



uint32_t amdgpu_mm_rreg(struct amdgpu_device *adev, uint32_t reg,

			bool always_indirect);

			uint32_t acc_flags);

void amdgpu_mm_wreg(struct amdgpu_device *adev, uint32_t reg, uint32_t v,

		    bool always_indirect);

		    uint32_t acc_flags);

u32 amdgpu_io_rreg(struct amdgpu_device *adev, u32 reg);

void amdgpu_io_wreg(struct amdgpu_device *adev, u32 reg, u32 v);
@@ -1517,11 +1517,18 @@ void amdgpu_mm_wdoorbell(struct amdgpu_device *adev, u32 index, u32 v); 
/*

 * Registers read & write functions.

 */

#define RREG32(reg) amdgpu_mm_rreg(adev, (reg), false)

#define RREG32_IDX(reg) amdgpu_mm_rreg(adev, (reg), true)

#define DREG32(reg) printk(KERN_INFO "REGISTER: " #reg " : 0x%08X\n", amdgpu_mm_rreg(adev, (reg), false))

#define WREG32(reg, v) amdgpu_mm_wreg(adev, (reg), (v), false)

#define WREG32_IDX(reg, v) amdgpu_mm_wreg(adev, (reg), (v), true)



#define AMDGPU_REGS_IDX       (1<<0)

#define AMDGPU_REGS_NO_KIQ    (1<<1)



#define RREG32_NO_KIQ(reg) amdgpu_mm_rreg(adev, (reg), AMDGPU_REGS_NO_KIQ)

#define WREG32_NO_KIQ(reg, v) amdgpu_mm_wreg(adev, (reg), (v), AMDGPU_REGS_NO_KIQ)



#define RREG32(reg) amdgpu_mm_rreg(adev, (reg), 0)

#define RREG32_IDX(reg) amdgpu_mm_rreg(adev, (reg), AMDGPU_REGS_IDX)

#define DREG32(reg) printk(KERN_INFO "REGISTER: " #reg " : 0x%08X\n", amdgpu_mm_rreg(adev, (reg), 0))

#define WREG32(reg, v) amdgpu_mm_wreg(adev, (reg), (v), 0)

#define WREG32_IDX(reg, v) amdgpu_mm_wreg(adev, (reg), (v), AMDGPU_REGS_IDX)

#define REG_SET(FIELD, v) (((v) << FIELD##_SHIFT) & FIELD##_MASK)

#define REG_GET(FIELD, v) (((v) << FIELD##_SHIFT) & FIELD##_MASK)

#define RREG32_PCIE(reg) adev->pcie_rreg(adev, (reg))

drivers/gpu/drm/amd/amdgpu/amdgpu_device.c

+6 −6
Original line number Diff line number Diff line
@@ -90,16 +90,16 @@ bool amdgpu_device_is_px(struct drm_device *dev) 
 * MMIO register access helper functions.

 */

uint32_t amdgpu_mm_rreg(struct amdgpu_device *adev, uint32_t reg,

			bool always_indirect)

			uint32_t acc_flags)

{

	uint32_t ret;



	if (amdgpu_sriov_runtime(adev)) {

	if (!(acc_flags & AMDGPU_REGS_NO_KIQ) && amdgpu_sriov_runtime(adev)) {

		BUG_ON(in_interrupt());

		return amdgpu_virt_kiq_rreg(adev, reg);

	}



	if ((reg * 4) < adev->rmmio_size && !always_indirect)

	if ((reg * 4) < adev->rmmio_size && !(acc_flags & AMDGPU_REGS_IDX))

		ret = readl(((void __iomem *)adev->rmmio) + (reg * 4));

	else {

		unsigned long flags;
@@ -114,16 +114,16 @@ uint32_t amdgpu_mm_rreg(struct amdgpu_device *adev, uint32_t reg, 
}



void amdgpu_mm_wreg(struct amdgpu_device *adev, uint32_t reg, uint32_t v,

		    bool always_indirect)

		    uint32_t acc_flags)

{

	trace_amdgpu_mm_wreg(adev->pdev->device, reg, v);



	if (amdgpu_sriov_runtime(adev)) {

	if (!(acc_flags & AMDGPU_REGS_NO_KIQ) && amdgpu_sriov_runtime(adev)) {

		BUG_ON(in_interrupt());

		return amdgpu_virt_kiq_wreg(adev, reg, v);

	}



	if ((reg * 4) < adev->rmmio_size && !always_indirect)

	if ((reg * 4) < adev->rmmio_size && !(acc_flags & AMDGPU_REGS_IDX))

		writel(v, ((void __iomem *)adev->rmmio) + (reg * 4));

	else {

		unsigned long flags;