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Commit 15c989d4 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge branch 'x86-fixes-for-linus' of... 

Merge branch 'x86-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip

* 'x86-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip:
  x86, k8 nb: Fix boot crash: enable k8_northbridges unconditionally on AMD systems
  x86, UV: Fix target_cpus() in x2apic_uv_x.c
  x86: Reduce per cpu warning boot up messages
  x86: Reduce per cpu MCA boot up messages
  x86_64, cpa: Don't work hard in preserving kernel 2M mappings when using 4K already
parents 4e3eaddd 0e152cd7

arch/x86/Kconfig

+2 −2
Original line number Diff line number Diff line
@@ -662,7 +662,7 @@ config GART_IOMMU 
	bool "GART IOMMU support" if EMBEDDED

	default y

	select SWIOTLB

	depends on X86_64 && PCI

	depends on X86_64 && PCI && K8_NB

	---help---

	  Support for full DMA access of devices with 32bit memory access only

	  on systems with more than 3GB. This is usually needed for USB,
@@ -2061,7 +2061,7 @@ endif # X86_32 


config K8_NB

	def_bool y

	depends on AGP_AMD64 || (X86_64 && (GART_IOMMU || (PCI && NUMA)))

	depends on CPU_SUP_AMD && PCI



source "drivers/pcmcia/Kconfig"

arch/x86/kernel/apic/x2apic_uv_x.c

+1 −3
Original line number Diff line number Diff line
@@ -120,11 +120,9 @@ EXPORT_SYMBOL_GPL(uv_possible_blades); 
unsigned long sn_rtc_cycles_per_second;

EXPORT_SYMBOL(sn_rtc_cycles_per_second);



/* Start with all IRQs pointing to boot CPU.  IRQ balancing will shift them. */



static const struct cpumask *uv_target_cpus(void)

{

	return cpumask_of(0);

	return cpu_online_mask;

}



static void uv_vector_allocation_domain(int cpu, struct cpumask *retmask)

arch/x86/kernel/cpu/mcheck/mce_intel.c

+2 −2
Original line number Diff line number Diff line
@@ -95,7 +95,7 @@ static void cmci_discover(int banks, int boot) 


		/* Already owned by someone else? */

		if (val & CMCI_EN) {

			if (test_and_clear_bit(i, owned) || boot)

			if (test_and_clear_bit(i, owned) && !boot)

				print_update("SHD", &hdr, i);

			__clear_bit(i, __get_cpu_var(mce_poll_banks));

			continue;
@@ -107,7 +107,7 @@ static void cmci_discover(int banks, int boot) 


		/* Did the enable bit stick? -- the bank supports CMCI */

		if (val & CMCI_EN) {

			if (!test_and_set_bit(i, owned) || boot)

			if (!test_and_set_bit(i, owned) && !boot)

				print_update("CMCI", &hdr, i);

			__clear_bit(i, __get_cpu_var(mce_poll_banks));

		} else {

arch/x86/kernel/k8.c

+14 −0
Original line number Diff line number Diff line
@@ -121,3 +121,17 @@ void k8_flush_garts(void) 
}

EXPORT_SYMBOL_GPL(k8_flush_garts);



static __init int init_k8_nbs(void)

{

	int err = 0;



	err = cache_k8_northbridges();



	if (err < 0)

		printk(KERN_NOTICE "K8 NB: Cannot enumerate AMD northbridges.\n");



	return err;

}



/* This has to go after the PCI subsystem */

fs_initcall(init_k8_nbs);

arch/x86/kernel/pci-gart_64.c

+1 −1
Original line number Diff line number Diff line
@@ -735,7 +735,7 @@ int __init gart_iommu_init(void) 
	unsigned long scratch;

	long i;



	if (cache_k8_northbridges() < 0 || num_k8_northbridges == 0)

	if (num_k8_northbridges == 0)

		return 0;



#ifndef CONFIG_AGP_AMD64