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Commit 15426dbb authored by Yong Zhao's avatar Yong Zhao Committed by Alex Deucher
Browse files

drm/amdkfd: Change the control stack MTYPE from UC to NC on GFX9 



CWSR fails on Raven if the control stack is MTYPE_UC, which is used
for regular GART mappings. As a workaround we map it using MTYPE_NC.

The MEC firmware expects the control stack at one page offset from the
start of the MQD so it is part of the MQD allocation on GFXv9. AMDGPU
added a memory allocation flag just for this purpose.

Acked-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Signed-off-by: default avatarYong Zhao <yong.zhao@amd.com>
Reviewed-by: default avatarFelix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: default avatarFelix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent caaa4c8a

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c

+5 −1
Original line number Diff line number Diff line
@@ -272,7 +272,7 @@ void amdgpu_amdkfd_gpu_reset(struct kgd_dev *kgd) 


int alloc_gtt_mem(struct kgd_dev *kgd, size_t size,

			void **mem_obj, uint64_t *gpu_addr,

			void **cpu_ptr)

			void **cpu_ptr, bool mqd_gfx9)

{

	struct amdgpu_device *adev = (struct amdgpu_device *)kgd;

	struct amdgpu_bo *bo = NULL;
@@ -287,6 +287,10 @@ int alloc_gtt_mem(struct kgd_dev *kgd, size_t size, 
	bp.flags = AMDGPU_GEM_CREATE_CPU_GTT_USWC;

	bp.type = ttm_bo_type_kernel;

	bp.resv = NULL;



	if (mqd_gfx9)

		bp.flags |= AMDGPU_GEM_CREATE_MQD_GFX9;



	r = amdgpu_bo_create(adev, &bp, &bo);

	if (r) {

		dev_err(adev->dev,

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.h

+1 −1
Original line number Diff line number Diff line
@@ -136,7 +136,7 @@ void amdgpu_amdkfd_gpu_reset(struct kgd_dev *kgd); 
/* Shared API */

int alloc_gtt_mem(struct kgd_dev *kgd, size_t size,

			void **mem_obj, uint64_t *gpu_addr,

			void **cpu_ptr);

			void **cpu_ptr, bool mqd_gfx9);

void free_gtt_mem(struct kgd_dev *kgd, void *mem_obj);

void get_local_mem_info(struct kgd_dev *kgd,

			struct kfd_local_mem_info *mem_info);

drivers/gpu/drm/amd/amdkfd/kfd_device.c

+2 −1
Original line number Diff line number Diff line
@@ -457,7 +457,8 @@ bool kgd2kfd_device_init(struct kfd_dev *kfd, 


	if (kfd->kfd2kgd->init_gtt_mem_allocation(

			kfd->kgd, size, &kfd->gtt_mem,

			&kfd->gtt_start_gpu_addr, &kfd->gtt_start_cpu_ptr)){

			&kfd->gtt_start_gpu_addr, &kfd->gtt_start_cpu_ptr,

			false)) {

		dev_err(kfd_device, "Could not allocate %d bytes\n", size);

		goto out;

	}

drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager_v9.c

+1 −1
Original line number Diff line number Diff line
@@ -88,7 +88,7 @@ static int init_mqd(struct mqd_manager *mm, void **mqd, 
				ALIGN(sizeof(struct v9_mqd), PAGE_SIZE),

			&((*mqd_mem_obj)->gtt_mem),

			&((*mqd_mem_obj)->gpu_addr),

			(void *)&((*mqd_mem_obj)->cpu_ptr));

			(void *)&((*mqd_mem_obj)->cpu_ptr), true);

	} else

		retval = kfd_gtt_sa_allocate(mm->dev, sizeof(struct v9_mqd),

				mqd_mem_obj);

drivers/gpu/drm/amd/include/kgd_kfd_interface.h

+1 −1
Original line number Diff line number Diff line
@@ -292,7 +292,7 @@ struct tile_config { 
struct kfd2kgd_calls {

	int (*init_gtt_mem_allocation)(struct kgd_dev *kgd, size_t size,

					void **mem_obj, uint64_t *gpu_addr,

					void **cpu_ptr);

					void **cpu_ptr, bool mqd_gfx9);



	void (*free_gtt_mem)(struct kgd_dev *kgd, void *mem_obj);