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Commit 1541f98c authored by David S. Miller's avatar David S. Miller
Browse files

Merge branch 'broadcom-phy-cleanup' 



Rafał Miłecki says:

====================
net-next: Broadcom PHY driver cleanup

I will probably need to use broadcom.ko for PHY connected to interface
of bgmac supported device so I started looking at it willing to
understand it better.

I found AUXCTL part of the driver / lib a bit confusing and hard to read
so I'm trying to clean it up a bit. I hope this patchset makes following
AUXCTL operations much easier making it clear which defines are for
registers and which for values.

There is no functional change in this pachset.
====================

Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parents 43450293 5e7bfa6c

drivers/net/phy/broadcom.c

+3 −5
Original line number Diff line number Diff line
@@ -395,12 +395,10 @@ static int bcm54612e_config_aneg(struct phy_device *phydev) 
	    (phydev->interface != PHY_INTERFACE_MODE_RGMII_RXID)) {

		u16 reg;



		/* Errata: reads require filling in the write selector field */

		bcm54xx_auxctl_write(phydev, MII_BCM54XX_AUXCTL_SHDWSEL_MISC,

				     MII_BCM54XX_AUXCTL_MISC_RDSEL_MISC);

		reg = phy_read(phydev, MII_BCM54XX_AUX_CTL);

		reg = bcm54xx_auxctl_read(phydev,

					  MII_BCM54XX_AUXCTL_SHDWSEL_MISC);

		/* Disable RXD to RXC delay (default set) */

		reg &= ~MII_BCM54XX_AUXCTL_MISC_RXD_RXC_SKEW;

		reg &= ~MII_BCM54XX_AUXCTL_SHDWSEL_MISC_RGMII_SKEW_EN;

		/* Clear shadow selector field */

		reg &= ~MII_BCM54XX_AUXCTL_SHDWSEL_MASK;

		bcm54xx_auxctl_write(phydev, MII_BCM54XX_AUXCTL_SHDWSEL_MISC,

include/linux/brcmphy.h

+7 −9
Original line number Diff line number Diff line
@@ -104,19 +104,17 @@ 
/*

 * AUXILIARY CONTROL SHADOW ACCESS REGISTERS.  (PHY REG 0x18)

 */

#define MII_BCM54XX_AUXCTL_SHDWSEL_AUXCTL	0x0000

#define MII_BCM54XX_AUXCTL_SHDWSEL_AUXCTL	0x00

#define MII_BCM54XX_AUXCTL_ACTL_TX_6DB		0x0400

#define MII_BCM54XX_AUXCTL_ACTL_SMDSP_ENA	0x0800



#define MII_BCM54XX_AUXCTL_MISC_WREN	0x8000

#define MII_BCM54XX_AUXCTL_MISC_RXD_RXC_SKEW	0x0100

#define MII_BCM54XX_AUXCTL_SHDWSEL_MISC			0x07

#define MII_BCM54XX_AUXCTL_SHDWSEL_MISC_WIRESPEED_EN	0x0010

#define MII_BCM54XX_AUXCTL_SHDWSEL_MISC_RGMII_SKEW_EN	0x0100

#define MII_BCM54XX_AUXCTL_MISC_FORCE_AMDIX		0x0200

#define MII_BCM54XX_AUXCTL_MISC_RDSEL_MISC	0x7000

#define MII_BCM54XX_AUXCTL_SHDWSEL_MISC	0x0007

#define MII_BCM54XX_AUXCTL_SHDWSEL_READ_SHIFT	12

#define MII_BCM54XX_AUXCTL_SHDWSEL_MISC_RGMII_SKEW_EN	(1 << 8)

#define MII_BCM54XX_AUXCTL_SHDWSEL_MISC_WIRESPEED_EN	(1 << 4)

#define MII_BCM54XX_AUXCTL_MISC_WREN			0x8000



#define MII_BCM54XX_AUXCTL_SHDWSEL_READ_SHIFT	12

#define MII_BCM54XX_AUXCTL_SHDWSEL_MASK	0x0007



/*