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Commit 14f4ac53 authored by Huang Rui's avatar Huang Rui Committed by Felipe Balbi
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usb: dwc3: add rx_detect to polling lfps quirk



This patch adds RX_DETECT to Polling.LFPS control quirk, and some special
platforms can configure that if it is needed.

[ balbi@ti.com : added DeviceTree binding documentation ]

Signed-off-by: default avatarHuang Rui <ray.huang@amd.com>
Signed-off-by: default avatarFelipe Balbi <balbi@ti.com>
parent fb67afca
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+2 −0
Original line number Original line Diff line number Diff line
@@ -27,6 +27,8 @@ Optional properties:
 - snps,del_phy_power_chg_quirk: when set core will delay PHY power change
 - snps,del_phy_power_chg_quirk: when set core will delay PHY power change
			from P0 to P1/P2/P3.
			from P0 to P1/P2/P3.
 - snps,lfps_filter_quirk: when set core will filter LFPS reception.
 - snps,lfps_filter_quirk: when set core will filter LFPS reception.
 - snps,rx_detect_poll_quirk: when set core will disable a 400us delay to start
			Polling LFPS after RX.Detect.


This is usually a subnode to DWC3 glue to which it is connected.
This is usually a subnode to DWC3 glue to which it is connected.


+6 −0
Original line number Original line Diff line number Diff line
@@ -389,6 +389,9 @@ static void dwc3_phy_setup(struct dwc3 *dwc)
	if (dwc->lfps_filter_quirk)
	if (dwc->lfps_filter_quirk)
		reg |= DWC3_GUSB3PIPECTL_LFPSFILT;
		reg |= DWC3_GUSB3PIPECTL_LFPSFILT;


	if (dwc->rx_detect_poll_quirk)
		reg |= DWC3_GUSB3PIPECTL_RX_DETOPOLL;

	dwc3_writel(dwc->regs, DWC3_GUSB3PIPECTL(0), reg);
	dwc3_writel(dwc->regs, DWC3_GUSB3PIPECTL(0), reg);


	mdelay(100);
	mdelay(100);
@@ -776,6 +779,8 @@ static int dwc3_probe(struct platform_device *pdev)
				"snps,del_phy_power_chg_quirk");
				"snps,del_phy_power_chg_quirk");
		dwc->lfps_filter_quirk = of_property_read_bool(node,
		dwc->lfps_filter_quirk = of_property_read_bool(node,
				"snps,lfps_filter_quirk");
				"snps,lfps_filter_quirk");
		dwc->rx_detect_poll_quirk = of_property_read_bool(node,
				"snps,rx_detect_poll_quirk");
	} else if (pdata) {
	} else if (pdata) {
		dwc->maximum_speed = pdata->maximum_speed;
		dwc->maximum_speed = pdata->maximum_speed;
		dwc->has_lpm_erratum = pdata->has_lpm_erratum;
		dwc->has_lpm_erratum = pdata->has_lpm_erratum;
@@ -792,6 +797,7 @@ static int dwc3_probe(struct platform_device *pdev)
		dwc->del_p1p2p3_quirk = pdata->del_p1p2p3_quirk;
		dwc->del_p1p2p3_quirk = pdata->del_p1p2p3_quirk;
		dwc->del_phy_power_chg_quirk = pdata->del_phy_power_chg_quirk;
		dwc->del_phy_power_chg_quirk = pdata->del_phy_power_chg_quirk;
		dwc->lfps_filter_quirk = pdata->lfps_filter_quirk;
		dwc->lfps_filter_quirk = pdata->lfps_filter_quirk;
		dwc->rx_detect_poll_quirk = pdata->rx_detect_poll_quirk;
	}
	}


	/* default to superspeed if no maximum_speed passed */
	/* default to superspeed if no maximum_speed passed */
+3 −0
Original line number Original line Diff line number Diff line
@@ -184,6 +184,7 @@
#define DWC3_GUSB3PIPECTL_DEPOCHANGE	(1 << 18)
#define DWC3_GUSB3PIPECTL_DEPOCHANGE	(1 << 18)
#define DWC3_GUSB3PIPECTL_SUSPHY	(1 << 17)
#define DWC3_GUSB3PIPECTL_SUSPHY	(1 << 17)
#define DWC3_GUSB3PIPECTL_LFPSFILT	(1 << 9)
#define DWC3_GUSB3PIPECTL_LFPSFILT	(1 << 9)
#define DWC3_GUSB3PIPECTL_RX_DETOPOLL	(1 << 8)


/* Global TX Fifo Size Register */
/* Global TX Fifo Size Register */
#define DWC3_GTXFIFOSIZ_TXFDEF(n)	((n) & 0xffff)
#define DWC3_GTXFIFOSIZ_TXFDEF(n)	((n) & 0xffff)
@@ -693,6 +694,7 @@ struct dwc3_scratchpad_array {
 * @del_p1p2p3_quirk: set if we enable delay p1p2p3 quirk
 * @del_p1p2p3_quirk: set if we enable delay p1p2p3 quirk
 * @del_phy_power_chg_quirk: set if we enable delay phy power change quirk
 * @del_phy_power_chg_quirk: set if we enable delay phy power change quirk
 * @lfps_filter_quirk: set if we enable LFPS filter quirk
 * @lfps_filter_quirk: set if we enable LFPS filter quirk
 * @rx_detect_poll_quirk: set if we enable rx_detect to polling lfps quirk
 */
 */
struct dwc3 {
struct dwc3 {
	struct usb_ctrlrequest	*ctrl_req;
	struct usb_ctrlrequest	*ctrl_req;
@@ -807,6 +809,7 @@ struct dwc3 {
	unsigned                del_p1p2p3_quirk:1;
	unsigned                del_p1p2p3_quirk:1;
	unsigned		del_phy_power_chg_quirk:1;
	unsigned		del_phy_power_chg_quirk:1;
	unsigned		lfps_filter_quirk:1;
	unsigned		lfps_filter_quirk:1;
	unsigned		rx_detect_poll_quirk:1;
};
};


/* -------------------------------------------------------------------------- */
/* -------------------------------------------------------------------------- */
+1 −0
Original line number Original line Diff line number Diff line
@@ -35,4 +35,5 @@ struct dwc3_platform_data {
	unsigned del_p1p2p3_quirk:1;
	unsigned del_p1p2p3_quirk:1;
	unsigned del_phy_power_chg_quirk:1;
	unsigned del_phy_power_chg_quirk:1;
	unsigned lfps_filter_quirk:1;
	unsigned lfps_filter_quirk:1;
	unsigned rx_detect_poll_quirk:1;
};
};