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Commit 14157f86 authored by Masahiro Yamada's avatar Masahiro Yamada Committed by Boris Brezillon
Browse files

mtd: nand: introduce NAND_ROW_ADDR_3 flag 



Several drivers check ->chipsize to see if the third row address cycle
is needed.  Instead of embedding magic sizes such as 32MB, 128MB in
drivers, introduce a new flag NAND_ROW_ADDR_3 for clean-up.  Since
nand_scan_ident() knows well about the device, it can handle this
properly.  The flag is set if the row address bit width is greater
than 16.

Delete comments such as "One more address cycle for ..." because
intention is now clear enough from the code.

Signed-off-by: default avatarMasahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: default avatarWenyou Yang <wenyou.yang@microchip.com>
Signed-off-by: default avatarBoris Brezillon <boris.brezillon@free-electrons.com>
parent 882fd157

drivers/mtd/nand/atmel/nand-controller.c

+1 −2
Original line number Diff line number Diff line
@@ -718,8 +718,7 @@ static void atmel_nfc_set_op_addr(struct nand_chip *chip, int page, int column) 
		nc->op.addrs[nc->op.naddrs++] = page;

		nc->op.addrs[nc->op.naddrs++] = page >> 8;



		if ((mtd->writesize > 512 && chip->chipsize > SZ_128M) ||

		    (mtd->writesize <= 512 && chip->chipsize > SZ_32M))

		if (chip->options & NAND_ROW_ADDR_3)

			nc->op.addrs[nc->op.naddrs++] = page >> 16;

	}

}

drivers/mtd/nand/au1550nd.c

+1 −2
Original line number Diff line number Diff line
@@ -331,8 +331,7 @@ static void au1550_command(struct mtd_info *mtd, unsigned command, int column, i 


			ctx->write_byte(mtd, (u8)(page_addr >> 8));



			/* One more address cycle for devices > 32MiB */

			if (this->chipsize > (32 << 20))

			if (this->options & NAND_ROW_ADDR_3)

				ctx->write_byte(mtd,

						((page_addr >> 16) & 0x0f));

		}

drivers/mtd/nand/diskonchip.c

+1 −2
Original line number Diff line number Diff line
@@ -705,8 +705,7 @@ static void doc2001plus_command(struct mtd_info *mtd, unsigned command, int colu 
		if (page_addr != -1) {

			WriteDOC((unsigned char)(page_addr & 0xff), docptr, Mplus_FlashAddress);

			WriteDOC((unsigned char)((page_addr >> 8) & 0xff), docptr, Mplus_FlashAddress);

			/* One more address cycle for higher density devices */

			if (this->chipsize & 0x0c000000) {

			if (this->options & NAND_ROW_ADDR_3) {

				WriteDOC((unsigned char)((page_addr >> 16) & 0x0f), docptr, Mplus_FlashAddress);

				printk("high density\n");

			}

drivers/mtd/nand/hisi504_nand.c

+1 −2
Original line number Diff line number Diff line
@@ -432,8 +432,7 @@ static void set_addr(struct mtd_info *mtd, int column, int page_addr) 
		host->addr_value[0] |= (page_addr & 0xffff)

			<< (host->addr_cycle * 8);

		host->addr_cycle    += 2;

		/* One more address cycle for devices > 128MiB */

		if (chip->chipsize > (128 << 20)) {

		if (chip->options & NAND_ROW_ADDR_3) {

			host->addr_cycle += 1;

			if (host->command == NAND_CMD_ERASE1)

				host->addr_value[0] |= ((page_addr >> 16) & 0xff) << 16;

drivers/mtd/nand/mxc_nand.c

+1 −2
Original line number Diff line number Diff line
@@ -859,8 +859,7 @@ static void mxc_do_addr_cycle(struct mtd_info *mtd, int column, int page_addr) 
				host->devtype_data->send_addr(host,

						(page_addr >> 8) & 0xff, true);

		} else {

			/* One more address cycle for higher density devices */

			if (mtd->size >= 0x4000000) {

			if (nand_chip->options & NAND_ROW_ADDR_3) {

				/* paddr_8 - paddr_15 */

				host->devtype_data->send_addr(host,

						(page_addr >> 8) & 0xff,