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Commit 13f62f54 authored by Dave Airlie's avatar Dave Airlie
Browse files

Merge branch 'drm-next-4.11' of git://people.freedesktop.org/~agd5f/linux into drm-next 

Some additional fixes for 4.11.  Delayed a bit due to Chinese New Year. Highlights:
- Powerplay fixes
- VCE and UVD powergating fixes
- Clean up amdgpu SI gfx code to match CI and VI
- Misc bug fixes

* 'drm-next-4.11' of git://people.freedesktop.org/~agd5f/linux: (30 commits)
  drm/amdgpu: report the number of bytes moved at buffer creation
  drm/amdgpu: fix a potential deadlock in amdgpu_bo_create_restricted()
  drm/amdgpu: add support for new smc firmware on polaris
  drm/amd/powerplay: refine code to avoid potential bug that the memory not cleared.
  drm/amdgpu: shut up #warning for compile testing
  drm/amdgpu/virt: fix double kfree on bo_va
  drm/radeon: remove some dead code
  drm/radeon: avoid kernel segfault in vce when gpu fails to resume
  drm/amd/powerplay: set fan speed to max in profile peak mode only.
  drm/amd/gfx6: update gb_addr_config
  drm/amdgpu: update HAINAN_GB_ADDR_CONFIG_GOLDEN
  drm/amdgpu: update VERDE_GB_ADDR_CONFIG_GOLDEN
  drm/amdgpu: refine si_read_register
  drm/amdgpu/gfx6: clean up spi configuration
  drm/amdgpu/gfx6: clean up cu configuration
  drm/amdgpu/gfx6: clean up rb configuration
  drm/amdgpu: refine vce3.0 code and related powerplay pg code.
  drm/amdgpu: move subfunctions to the front of vce_v2_0.c.
  drm/amdgpu: enable vce pg feature on Kv.
  drm/amdgpu: refine code for VCE2.0 and related dpm code.
  ...
parents f320d357 fad06127

drivers/gpu/drm/amd/amdgpu/amdgpu.h

+1 −0
Original line number Diff line number Diff line
@@ -1709,6 +1709,7 @@ int amdgpu_cs_parser_init(struct amdgpu_cs_parser *p, void *data); 
int amdgpu_cs_get_ring(struct amdgpu_device *adev, u32 ip_type,

		       u32 ip_instance, u32 ring,

		       struct amdgpu_ring **out_ring);

void amdgpu_cs_report_moved_bytes(struct amdgpu_device *adev, u64 num_bytes);

void amdgpu_ttm_placement_from_domain(struct amdgpu_bo *abo, u32 domain);

bool amdgpu_ttm_bo_is_amdgpu_bo(struct ttm_buffer_object *bo);

int amdgpu_ttm_tt_get_user_pages(struct ttm_tt *ttm, struct page **pages);

drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c

+27 −6
Original line number Diff line number Diff line
@@ -850,16 +850,37 @@ static int amdgpu_cgs_get_firmware_info(struct cgs_device *cgs_device, 
				strcpy(fw_name, "amdgpu/fiji_smc.bin");

				break;

			case CHIP_POLARIS11:

				if (type == CGS_UCODE_ID_SMU)

				if (type == CGS_UCODE_ID_SMU) {

					if (((adev->pdev->device == 0x67ef) &&

					     ((adev->pdev->revision == 0xe0) ||

					      (adev->pdev->revision == 0xe2) ||

					      (adev->pdev->revision == 0xe5))) ||

					    ((adev->pdev->device == 0x67ff) &&

					     ((adev->pdev->revision == 0xcf) ||

					      (adev->pdev->revision == 0xef) ||

					      (adev->pdev->revision == 0xff))))

						strcpy(fw_name, "amdgpu/polaris11_k_smc.bin");

					else

						strcpy(fw_name, "amdgpu/polaris11_smc.bin");

				else if (type == CGS_UCODE_ID_SMU_SK)

				} else if (type == CGS_UCODE_ID_SMU_SK) {

					strcpy(fw_name, "amdgpu/polaris11_smc_sk.bin");

				}

				break;

			case CHIP_POLARIS10:

				if (type == CGS_UCODE_ID_SMU)

				if (type == CGS_UCODE_ID_SMU) {

					if ((adev->pdev->device == 0x67df) &&

					    ((adev->pdev->revision == 0xe0) ||

					     (adev->pdev->revision == 0xe3) ||

					     (adev->pdev->revision == 0xe4) ||

					     (adev->pdev->revision == 0xe5) ||

					     (adev->pdev->revision == 0xe7) ||

					     (adev->pdev->revision == 0xef)))

						strcpy(fw_name, "amdgpu/polaris10_k_smc.bin");

					else

						strcpy(fw_name, "amdgpu/polaris10_smc.bin");

				else if (type == CGS_UCODE_ID_SMU_SK)

				} else if (type == CGS_UCODE_ID_SMU_SK) {

					strcpy(fw_name, "amdgpu/polaris10_smc_sk.bin");

				}

				break;

			case CHIP_POLARIS12:

				strcpy(fw_name, "amdgpu/polaris12_smc.bin");

drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c

+1 −2
Original line number Diff line number Diff line
@@ -344,8 +344,7 @@ static u64 amdgpu_cs_get_threshold_for_moves(struct amdgpu_device *adev) 
 * submission. This can result in a debt that can stop buffer migrations

 * temporarily.

 */

static void amdgpu_cs_report_moved_bytes(struct amdgpu_device *adev,

					 u64 num_bytes)

void amdgpu_cs_report_moved_bytes(struct amdgpu_device *adev, u64 num_bytes)

{

	spin_lock(&adev->mm_stats.lock);

	adev->mm_stats.accum_us -= bytes_to_us(adev, num_bytes);

drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c

+18 −36
Original line number Diff line number Diff line
@@ -487,67 +487,50 @@ static int amdgpu_gem_va_check(void *param, struct amdgpu_bo *bo) 
 *

 * @adev: amdgpu_device pointer

 * @bo_va: bo_va to update

 * @list: validation list

 * @operation: map or unmap

 *

 * Update the bo_va directly after setting it's address. Errors are not

 * Update the bo_va directly after setting its address. Errors are not

 * vital here, so they are not reported back to userspace.

 */

static void amdgpu_gem_va_update_vm(struct amdgpu_device *adev,

				    struct amdgpu_bo_va *bo_va,

				    struct list_head *list,

				    uint32_t operation)

{

	struct ttm_validate_buffer tv, *entry;

	struct amdgpu_bo_list_entry vm_pd;

	struct ww_acquire_ctx ticket;

	struct list_head list, duplicates;

	int r;



	INIT_LIST_HEAD(&list);

	INIT_LIST_HEAD(&duplicates);



	tv.bo = &bo_va->bo->tbo;

	tv.shared = true;

	list_add(&tv.head, &list);

	struct ttm_validate_buffer *entry;

	int r = -ERESTARTSYS;



	amdgpu_vm_get_pd_bo(bo_va->vm, &list, &vm_pd);



	/* Provide duplicates to avoid -EALREADY */

	r = ttm_eu_reserve_buffers(&ticket, &list, true, &duplicates);

	if (r)

		goto error_print;



	list_for_each_entry(entry, &list, head) {

	list_for_each_entry(entry, list, head) {

		struct amdgpu_bo *bo =

			container_of(entry->bo, struct amdgpu_bo, tbo);



		/* if anything is swapped out don't swap it in here,

		   just abort and wait for the next CS */

		if (!amdgpu_bo_gpu_accessible(bo))

			goto error_unreserve;

			goto error;



		if (bo->shadow && !amdgpu_bo_gpu_accessible(bo->shadow))

			goto error_unreserve;

			goto error;

	}



	r = amdgpu_vm_validate_pt_bos(adev, bo_va->vm, amdgpu_gem_va_check,

				      NULL);

	if (r)

		goto error_unreserve;

		goto error;



	r = amdgpu_vm_update_page_directory(adev, bo_va->vm);

	if (r)

		goto error_unreserve;

		goto error;



	r = amdgpu_vm_clear_freed(adev, bo_va->vm);

	if (r)

		goto error_unreserve;

		goto error;



	if (operation == AMDGPU_VA_OP_MAP)

		r = amdgpu_vm_bo_update(adev, bo_va, false);



error_unreserve:

	ttm_eu_backoff_reservation(&ticket, &list);



error_print:

error:

	if (r && r != -ERESTARTSYS)

		DRM_ERROR("Couldn't update BO_VA (%d)\n", r);

}
@@ -564,7 +547,7 @@ int amdgpu_gem_va_ioctl(struct drm_device *dev, void *data, 
	struct amdgpu_bo_list_entry vm_pd;

	struct ttm_validate_buffer tv;

	struct ww_acquire_ctx ticket;

	struct list_head list, duplicates;

	struct list_head list;

	uint32_t invalid_flags, va_flags = 0;

	int r = 0;
@@ -602,14 +585,13 @@ int amdgpu_gem_va_ioctl(struct drm_device *dev, void *data, 
		return -ENOENT;

	abo = gem_to_amdgpu_bo(gobj);

	INIT_LIST_HEAD(&list);

	INIT_LIST_HEAD(&duplicates);

	tv.bo = &abo->tbo;

	tv.shared = true;

	tv.shared = false;

	list_add(&tv.head, &list);



	amdgpu_vm_get_pd_bo(&fpriv->vm, &list, &vm_pd);



	r = ttm_eu_reserve_buffers(&ticket, &list, true, &duplicates);

	r = ttm_eu_reserve_buffers(&ticket, &list, true, NULL);

	if (r) {

		drm_gem_object_unreference_unlocked(gobj);

		return r;
@@ -640,10 +622,10 @@ int amdgpu_gem_va_ioctl(struct drm_device *dev, void *data, 
	default:

		break;

	}

	ttm_eu_backoff_reservation(&ticket, &list);

	if (!r && !(args->flags & AMDGPU_VM_DELAY_UPDATE) &&

	    !amdgpu_vm_debug)

		amdgpu_gem_va_update_vm(adev, bo_va, args->operation);

		amdgpu_gem_va_update_vm(adev, bo_va, &list, args->operation);

	ttm_eu_backoff_reservation(&ticket, &list);



	drm_gem_object_unreference_unlocked(gobj);

	return r;

drivers/gpu/drm/amd/amdgpu/amdgpu_object.c

+12 −1
Original line number Diff line number Diff line
@@ -323,6 +323,7 @@ int amdgpu_bo_create_restricted(struct amdgpu_device *adev, 
	struct amdgpu_bo *bo;

	enum ttm_bo_type type;

	unsigned long page_align;

	u64 initial_bytes_moved;

	size_t acc_size;

	int r;
@@ -374,8 +375,10 @@ int amdgpu_bo_create_restricted(struct amdgpu_device *adev, 
	 * See https://bugs.freedesktop.org/show_bug.cgi?id=88758

	 */



#ifndef CONFIG_COMPILE_TEST

#warning Please enable CONFIG_MTRR and CONFIG_X86_PAT for better performance \

	 thanks to write-combining

#endif



	if (bo->flags & AMDGPU_GEM_CREATE_CPU_GTT_USWC)

		DRM_INFO_ONCE("Please enable CONFIG_MTRR and CONFIG_X86_PAT for "
@@ -399,12 +402,20 @@ int amdgpu_bo_create_restricted(struct amdgpu_device *adev, 
		locked = ww_mutex_trylock(&bo->tbo.ttm_resv.lock);

		WARN_ON(!locked);

	}



	initial_bytes_moved = atomic64_read(&adev->num_bytes_moved);

	r = ttm_bo_init(&adev->mman.bdev, &bo->tbo, size, type,

			&bo->placement, page_align, !kernel, NULL,

			acc_size, sg, resv ? resv : &bo->tbo.ttm_resv,

			&amdgpu_ttm_bo_destroy);

	if (unlikely(r != 0))

	amdgpu_cs_report_moved_bytes(adev,

		atomic64_read(&adev->num_bytes_moved) - initial_bytes_moved);



	if (unlikely(r != 0)) {

		if (!resv)

			ww_mutex_unlock(&bo->tbo.resv->lock);

		return r;

	}



	bo->tbo.priority = ilog2(bo->tbo.num_pages);

	if (kernel)