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Commit 12390605 authored by Koji Matsuoka's avatar Koji Matsuoka Committed by Geert Uytterhoeven
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clk: renesas: r8a7796: Add HDMI clock 



This patch adds HDMI-IF0 clock for R8A7796 SoC.

Signed-off-by: default avatarKoji Matsuoka <koji.matsuoka.xm@renesas.com>
Signed-off-by: default avatarTakeshi Kihara <takeshi.kihara.df@renesas.com>
Signed-off-by: default avatarYoshihiro Kaneko <ykaneko0929@gmail.com>
Signed-off-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
parent f5ca0114

drivers/clk/renesas/r8a7796-cpg-mssr.c

+2 −0
Original line number Diff line number Diff line
@@ -106,6 +106,7 @@ static const struct cpg_core_clk r8a7796_core_clks[] __initconst = { 
	DEF_DIV6P1("canfd",     R8A7796_CLK_CANFD, CLK_PLL1_DIV4, 0x244),

	DEF_DIV6P1("csi0",      R8A7796_CLK_CSI0,  CLK_PLL1_DIV4, 0x00c),

	DEF_DIV6P1("mso",       R8A7796_CLK_MSO,   CLK_PLL1_DIV4, 0x014),

	DEF_DIV6P1("hdmi",      R8A7796_CLK_HDMI,  CLK_PLL1_DIV4, 0x250),



	DEF_DIV6_RO("osc",      R8A7796_CLK_OSC,   CLK_EXTAL, CPG_RCKCR,  8),

	DEF_DIV6_RO("r_int",    CLK_RINT,          CLK_EXTAL, CPG_RCKCR, 32),
@@ -170,6 +171,7 @@ static const struct mssr_mod_clk r8a7796_mod_clks[] __initconst = { 
	DEF_MOD("du1",			 723,	R8A7796_CLK_S2D1),

	DEF_MOD("du0",			 724,	R8A7796_CLK_S2D1),

	DEF_MOD("lvds",			 727,	R8A7796_CLK_S2D1),

	DEF_MOD("hdmi0",		 729,	R8A7796_CLK_HDMI),

	DEF_MOD("vin7",			 804,	R8A7796_CLK_S0D2),

	DEF_MOD("vin6",			 805,	R8A7796_CLK_S0D2),

	DEF_MOD("vin5",			 806,	R8A7796_CLK_S0D2),