Commit 11a3799d authored Jun 16, 2017 by Maciej W. Rozycki Committed by Ralf Baechle Jun 29, 2017

MIPS: Fix unaligned PC interpretation in `compute_return_epc'



Fix a regression introduced with commit fb6883e5 ("MIPS: microMIPS:
Support handling of delay slots.") and defer to `__compute_return_epc'
if the ISA bit is set in EPC with non-MIPS16, non-microMIPS hardware,
which will then arrange for a SIGBUS due to an unaligned instruction
reference.  Returning EPC here is never correct as the API defines this
function's result to be either a negative error code on failure or one
of 0 and BRANCH_LIKELY_TAKEN on success.

Fixes: fb6883e5 ("MIPS: microMIPS: Support handling of delay slots.")
Signed-off-by: Maciej W. Rozycki <macro@imgtec.com>
Cc: James Hogan <james.hogan@imgtec.com>
Cc: linux-mips@linux-mips.org
Cc: stable@vger.kernel.org # 3.9+
Patchwork: https://patchwork.linux-mips.org/patch/16395/


Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

parent a9db101b

arch/mips/include/asm/branch.h

+1 −4

Original line number	Original line	Diff line number	Diff line
	@@ -74,10 +74,7 @@ static inline int compute_return_epc(struct pt_regs *regs)
	return __microMIPS_compute_return_epc(regs);		return __microMIPS_compute_return_epc(regs);
	if (cpu_has_mips16)		if (cpu_has_mips16)
	return __MIPS16e_compute_return_epc(regs);		return __MIPS16e_compute_return_epc(regs);
	return regs->cp0_epc;		} else if (!delay_slot(regs)) {
	}

	if (!delay_slot(regs)) {
	regs->cp0_epc += 4;		regs->cp0_epc += 4;
	return 0;		return 0;
	}		}