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Commit 10b6339e authored by Linus Torvalds's avatar Linus Torvalds
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Merge tag 'clk-for-linus' of git://git.linaro.org/people/mturquette/linux

Pull clock framework update from Michael Turquette:
 "The common clock framework changes for 3.9 are almost entirely fixes.

  None are dire enough to be Cc'd to stable which may be interpreted to
  mean that users of the framework are reaching stability.  Lots of new
  adoption of this framework is via DeviceTree data and that comes
  through the respective architecture and platform trees instead of
  through the clk framework tree.

  Two new features are improved debugfs output and an improvement to how
  DT clocks are initialized by reusing a common method."

* tag 'clk-for-linus' of git://git.linaro.org/people/mturquette/linux: (25 commits)
  clk: sunxi: remove stale Makefile entry
  clk: vexpress: Use common of_clk_init() function
  clk: zynq: Use common of_clk_init() function
  clk: vt8500: Use common of_clk_init() function
  clk: highbank: Use common of_clk_init() function
  clk: sunxi: Use common of_clk_init() function
  clk: add common of_clk_init() function
  clk: Deduplicate exit code in clk_set_rate
  clk: beautify Makefile
  clk-divider: fix macros
  clk: prima2: enable dt-binding clkdev mapping
  clk: mxs: Index is always positive
  clk: max77686: Avoid double free at remove time
  clk: remove exported function from __init section
  clk: vt8500: Add support for WM8750/WM8850 PLL clocks
  clk: vt8500: Fix division-by-0 when requested rate=0
  clk: vt8500: Fix device clock divisor calculations
  clk: vt8500: Fix error in PLL calculations on non-exact match.
  clk: max77686: Remove unnecessary NULL checking for container_of()
  clk: JSON debugfs clock tree summary
  ...
parents c6699b58 fde8bc59
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+73 −0
Original line number Diff line number Diff line
* Clock bindings for CSR SiRFprimaII

Required properties:
- compatible: Should be "sirf,prima2-clkc"
- reg: Address and length of the register set
- interrupts: Should contain clock controller interrupt
- #clock-cells: Should be <1>

The clock consumer should specify the desired clock by having the clock
ID in its "clocks" phandle cell.  The following is a full list of prima2
clocks and IDs.

	Clock			ID
	---------------------------
	rtc			0
	osc             	1
	pll1            	2
	pll2            	3
	pll3            	4
	mem             	5
	sys             	6
	security        	7
	dsp             	8
	gps             	9
	mf              	10
	io              	11
	cpu             	12
	uart0           	13
	uart1           	14
	uart2           	15
	tsc             	16
	i2c0            	17
	i2c1            	18
	spi0            	19
	spi1            	20
	pwmc            	21
	efuse           	22
	pulse           	23
	dmac0           	24
	dmac1           	25
	nand            	26
	audio           	27
	usp0            	28
	usp1            	29
	usp2            	30
	vip             	31
	gfx             	32
	mm              	33
	lcd             	34
	vpp             	35
	mmc01           	36
	mmc23           	37
	mmc45           	38
	usbpll          	39
	usb0            	40
	usb1			41

Examples:

clks: clock-controller@88000000 {
	compatible = "sirf,prima2-clkc";
	reg = <0x88000000 0x1000>;
	interrupts = <3>;
	#clock-cells = <1>;
};

i2c0: i2c@b00e0000 {
	cell-index = <0>;
	compatible = "sirf,prima2-i2c";
	reg = <0xb00e0000 0x10000>;
	interrupts = <24>;
	clocks = <&clks 17>;
};
+30 −1
Original line number Diff line number Diff line
@@ -58,10 +58,11 @@
			#size-cells = <1>;
			ranges = <0x88000000 0x88000000 0x40000>;

			clock-controller@88000000 {
			clks: clock-controller@88000000 {
				compatible = "sirf,prima2-clkc";
				reg = <0x88000000 0x1000>;
				interrupts = <3>;
				#clock-cells = <1>;
			};

			reset-controller@88010000 {
@@ -85,6 +86,7 @@
				compatible = "sirf,prima2-memc";
				reg = <0x90000000 0x10000>;
				interrupts = <27>;
				clocks = <&clks 5>;
			};
		};

@@ -104,6 +106,7 @@
				compatible = "sirf,prima2-vpp";
				reg = <0x90020000 0x10000>;
				interrupts = <31>;
				clocks = <&clks 35>;
			};
		};

@@ -117,6 +120,7 @@
				compatible = "powervr,sgx531";
				reg = <0x98000000 0x8000000>;
				interrupts = <6>;
				clocks = <&clks 32>;
			};
		};

@@ -130,6 +134,7 @@
				compatible = "sirf,prima2-video-codec";
				reg = <0xa0000000 0x8000000>;
				interrupts = <5>;
				clocks = <&clks 33>;
			};
		};

@@ -149,12 +154,14 @@
				compatible = "sirf,prima2-gps";
				reg = <0xa8010000 0x10000>;
				interrupts = <7>;
				clocks = <&clks 9>;
			};

			dsp@a9000000 {
				compatible = "sirf,prima2-dsp";
				reg = <0xa9000000 0x1000000>;
				interrupts = <8>;
				clocks = <&clks 8>;
			};
		};

@@ -174,12 +181,14 @@
				compatible = "sirf,prima2-nand";
				reg = <0xb0030000 0x10000>;
				interrupts = <41>;
				clocks = <&clks 26>;
			};

			audio@b0040000 {
				compatible = "sirf,prima2-audio";
				reg = <0xb0040000 0x10000>;
				interrupts = <35>;
				clocks = <&clks 27>;
			};

			uart0: uart@b0050000 {
@@ -187,6 +196,7 @@
				compatible = "sirf,prima2-uart";
				reg = <0xb0050000 0x10000>;
				interrupts = <17>;
				clocks = <&clks 13>;
			};

			uart1: uart@b0060000 {
@@ -194,6 +204,7 @@
				compatible = "sirf,prima2-uart";
				reg = <0xb0060000 0x10000>;
				interrupts = <18>;
				clocks = <&clks 14>;
			};

			uart2: uart@b0070000 {
@@ -201,6 +212,7 @@
				compatible = "sirf,prima2-uart";
				reg = <0xb0070000 0x10000>;
				interrupts = <19>;
				clocks = <&clks 15>;
			};

			usp0: usp@b0080000 {
@@ -208,6 +220,7 @@
				compatible = "sirf,prima2-usp";
				reg = <0xb0080000 0x10000>;
				interrupts = <20>;
				clocks = <&clks 28>;
			};

			usp1: usp@b0090000 {
@@ -215,6 +228,7 @@
				compatible = "sirf,prima2-usp";
				reg = <0xb0090000 0x10000>;
				interrupts = <21>;
				clocks = <&clks 29>;
			};

			usp2: usp@b00a0000 {
@@ -222,6 +236,7 @@
				compatible = "sirf,prima2-usp";
				reg = <0xb00a0000 0x10000>;
				interrupts = <22>;
				clocks = <&clks 30>;
			};

			dmac0: dma-controller@b00b0000 {
@@ -229,6 +244,7 @@
				compatible = "sirf,prima2-dmac";
				reg = <0xb00b0000 0x10000>;
				interrupts = <12>;
				clocks = <&clks 24>;
			};

			dmac1: dma-controller@b0160000 {
@@ -236,11 +252,13 @@
				compatible = "sirf,prima2-dmac";
				reg = <0xb0160000 0x10000>;
				interrupts = <13>;
				clocks = <&clks 25>;
			};

			vip@b00C0000 {
				compatible = "sirf,prima2-vip";
				reg = <0xb00C0000 0x10000>;
				clocks = <&clks 31>;
			};

			spi0: spi@b00d0000 {
@@ -248,6 +266,7 @@
				compatible = "sirf,prima2-spi";
				reg = <0xb00d0000 0x10000>;
				interrupts = <15>;
				clocks = <&clks 19>;
			};

			spi1: spi@b0170000 {
@@ -255,6 +274,7 @@
				compatible = "sirf,prima2-spi";
				reg = <0xb0170000 0x10000>;
				interrupts = <16>;
				clocks = <&clks 20>;
			};

			i2c0: i2c@b00e0000 {
@@ -262,6 +282,7 @@
				compatible = "sirf,prima2-i2c";
				reg = <0xb00e0000 0x10000>;
				interrupts = <24>;
				clocks = <&clks 17>;
			};

			i2c1: i2c@b00f0000 {
@@ -269,12 +290,14 @@
				compatible = "sirf,prima2-i2c";
				reg = <0xb00f0000 0x10000>;
				interrupts = <25>;
				clocks = <&clks 18>;
			};

			tsc@b0110000 {
				compatible = "sirf,prima2-tsc";
				reg = <0xb0110000 0x10000>;
				interrupts = <33>;
				clocks = <&clks 16>;
			};

			gpio: pinctrl@b0120000 {
@@ -507,17 +530,20 @@
			pwm@b0130000 {
				compatible = "sirf,prima2-pwm";
				reg = <0xb0130000 0x10000>;
				clocks = <&clks 21>;
			};

			efusesys@b0140000 {
				compatible = "sirf,prima2-efuse";
				reg = <0xb0140000 0x10000>;
				clocks = <&clks 22>;
			};

			pulsec@b0150000 {
				compatible = "sirf,prima2-pulsec";
				reg = <0xb0150000 0x10000>;
				interrupts = <48>;
				clocks = <&clks 23>;
			};

			pci-iobg {
@@ -616,12 +642,14 @@
				compatible = "chipidea,ci13611a-prima2";
				reg = <0xb8000000 0x10000>;
				interrupts = <10>;
				clocks = <&clks 40>;
			};

			usb1: usb@b00f0000 {
				compatible = "chipidea,ci13611a-prima2";
				reg = <0xb8010000 0x10000>;
				interrupts = <11>;
				clocks = <&clks 41>;
			};

			sata@b00f0000 {
@@ -634,6 +662,7 @@
				compatible = "sirf,prima2-security";
				reg = <0xb8030000 0x10000>;
				interrupts = <42>;
				clocks = <&clks 7>;
			};
		};
	};
+0 −1
Original line number Diff line number Diff line
@@ -2,7 +2,6 @@
#define __HIGHBANK_CORE_H

extern void highbank_set_cpu_jump(int cpu, void *jump_addr);
extern void highbank_clocks_init(void);
extern void highbank_restart(char, const char *);
extern void __iomem *scu_base_addr;

+2 −1
Original line number Diff line number Diff line
@@ -25,6 +25,7 @@
#include <linux/of_address.h>
#include <linux/smp.h>
#include <linux/amba/bus.h>
#include <linux/clk-provider.h>

#include <asm/arch_timer.h>
#include <asm/cacheflush.h>
@@ -117,7 +118,7 @@ static void __init highbank_timer_init(void)
	WARN_ON(!timer_base);
	irq = irq_of_parse_and_map(np, 0);

	highbank_clocks_init();
	of_clk_init(NULL);
	lookup.clk = of_clk_get(np, 0);
	clkdev_add(&lookup);

+7 −3
Original line number Diff line number Diff line
# common clock types
obj-$(CONFIG_HAVE_CLK)		+= clk-devres.o
obj-$(CONFIG_CLKDEV_LOOKUP)	+= clkdev.o
obj-$(CONFIG_COMMON_CLK)	+= clk.o clk-fixed-rate.o clk-gate.o \
				   clk-mux.o clk-divider.o clk-fixed-factor.o
obj-$(CONFIG_COMMON_CLK)	+= clk.o
obj-$(CONFIG_COMMON_CLK)	+= clk-divider.o
obj-$(CONFIG_COMMON_CLK)	+= clk-fixed-factor.o
obj-$(CONFIG_COMMON_CLK)	+= clk-fixed-rate.o
obj-$(CONFIG_COMMON_CLK)	+= clk-gate.o
obj-$(CONFIG_COMMON_CLK)	+= clk-mux.o

# SoCs specific
obj-$(CONFIG_ARCH_BCM2835)	+= clk-bcm2835.o
obj-$(CONFIG_ARCH_NOMADIK)	+= clk-nomadik.o
@@ -20,7 +25,6 @@ endif
obj-$(CONFIG_MACH_LOONGSON1)	+= clk-ls1x.o
obj-$(CONFIG_ARCH_U8500)	+= ux500/
obj-$(CONFIG_ARCH_VT8500)	+= clk-vt8500.o
obj-$(CONFIG_ARCH_SUNXI)	+= clk-sunxi.o
obj-$(CONFIG_ARCH_ZYNQ)		+= clk-zynq.o

# Chip specific
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