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Commit 0fe9de94 authored by Umang Chheda's avatar Umang Chheda Committed by Gerrit - the friendly Code Review server
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ARM: dts: msm: Add base device tree for PM2250 

Add initial device tree for PM2250 with base nodes for
revid, pon, gpio, rtc, pwm, temp-alarm and vib_ldo peripherals.

Change-Id: Ifbbb121beaec59e3d87b2f2535b5013feb5cb99e
parent a512cab7

qcom/pm2250.dtsi

0 → 100644
+122 −0
Original line number Diff line number Diff line 
#include <dt-bindings/input/input.h>

#include <dt-bindings/input/qcom,qpnp-power-on.h>

#include <dt-bindings/interrupt-controller/irq.h>

#include <dt-bindings/spmi/spmi.h>



&spmi_bus {

	#address-cells = <2>;

	#size-cells = <0>;

	interrupt-controller;

	#interrupt-cells = <4>;



	qcom,pm2250@0 {

		compatible = "qcom,spmi-pmic";

		reg = <0x0 SPMI_USID>;

		#address-cells = <2>;

		#size-cells = <0>;



		pm2250_revid: qcom,revid@100 {

			compatible = "qcom,qpnp-revid";

			reg = <0x100 0x100>;

		};



		qcom,power-on@800 {

			compatible = "qcom,qpnp-power-on";

			reg = <0x800 0x100>;

			interrupts = <0x0 0x8 0x0 IRQ_TYPE_EDGE_BOTH>,

					<0x0 0x8 0x1 IRQ_TYPE_EDGE_BOTH>;

			interrupt-names = "kpdpwr", "resin";

			qcom,pon-dbc-delay = <15625>;

			qcom,kpdpwr-sw-debounce;

			qcom,system-reset;

			qcom,store-hard-reset-reason;



			qcom,pon_1 {

				qcom,pon-type = <PON_POWER_ON_TYPE_KPDPWR>;

				qcom,pull-up = <1>;

				linux,code = <KEY_POWER>;

			};



			qcom,pon_2 {

				qcom,pon-type = <PON_POWER_ON_TYPE_RESIN>;

				qcom,pull-up = <1>;

				linux,code = <KEY_VOLUMEDOWN>;

			};

		};



		pm2250_tz: qcom,temp-alarm@2400 {

			compatible = "qcom,spmi-temp-alarm";

			reg = <0x2400 0x100>;

			interrupts = <0x0 0x24 0x0 IRQ_TYPE_EDGE_BOTH>;

			#thermal-sensor-cells = <0>;

			qcom,temperature-threshold-set = <1>;

		};



		pmi2250_gpios: pinctrl@c000 {

			compatible = "qcom,spmi-gpio";

			reg = <0xc000 0xa00>;

			interrupts = <0x0 0xc0 0 IRQ_TYPE_NONE>,

					<0x0 0xc1 0 IRQ_TYPE_NONE>,

					<0x0 0xc2 0 IRQ_TYPE_NONE>,

					<0x0 0xc3 0 IRQ_TYPE_NONE>,

					<0x0 0xc4 0 IRQ_TYPE_NONE>,

					<0x0 0xc5 0 IRQ_TYPE_NONE>,

					<0x0 0xc6 0 IRQ_TYPE_NONE>,

					<0x0 0xc7 0 IRQ_TYPE_NONE>,

					<0x0 0xc8 0 IRQ_TYPE_NONE>,

					<0x0 0xc9 0 IRQ_TYPE_NONE>;



			interrupt-names = "pm2250_gpio1", "pm2250_gpio2",

					"pm2250_gpio3", "pm2250_gpio4",

					"pm2250_gpio5", "pm2250_gpio6",

					"pm2250_gpio7", "pm2250_gpio8",

					"pm2250_gpio9", "pm2250_gpio10";



			gpio-controller;

			#gpio-cells = <2>;

		};



		pm2250_rtc: qcom,pm2250_rtc {

			compatible = "qcom,pm8941-rtc";

			interrupts = <0x0 0x61 0x1 IRQ_TYPE_NONE>;

		};

	};



	pm2250_1: qcom,pm2250@1 {

		compatible = "qcom,spmi-pmic";

		reg = <0x1 SPMI_USID>;

		#address-cells = <2>;

		#size-cells = <0>;



		pm2250_vib: qcom,vibrator@5600 {

			compatible = "qcom,qpnp-vibrator-ldo";

			reg = <0x5600 0x100>;

			qcom,vib-ldo-volt-uv = <3000000>;

			qcom,disable-overdrive;

		};



		pm2250_pwm1: qcom,pwms@bc00 {

			compatible = "qcom,pwm-lpg";

			reg = <0xbc00 0x100>;

			reg-names = "lpg-base";

			qcom,num-lpg-channels = <1>;

			#pwm-cells = <2>;

		};



		pm2250_pwm2: qcom,pwms@bd00 {

			compatible = "qcom,pwm-lpg";

			reg = <0xbd00 0x100>;

			reg-names = "lpg-base";

			qcom,num-lpg-channels = <1>;

			#pwm-cells = <2>;

		};



		pm2250_pwm3: qcom,pwms@be00 {

			compatible = "qcom,pwm-lpg";

			reg = <0xbe00 0x100>;

			reg-names = "lpg-base";

			qcom,num-lpg-channels = <1>;

			#pwm-cells = <2>;

		};

	};

};

qcom/scuba.dtsi

+20 −0
Original line number Diff line number Diff line
@@ -2,6 +2,7 @@ 
#include <dt-bindings/clock/qcom,dispcc-scuba.h>

#include <dt-bindings/clock/qcom,gcc-scuba.h>

#include <dt-bindings/clock/qcom,gpucc-scuba.h>

#include <dt-bindings/spmi/spmi.h>

#include <dt-bindings/clock/qcom,rpmcc.h>

#include <dt-bindings/regulator/qcom,rpmh-regulator-levels.h>
@@ -1085,6 +1086,25 @@ 
			#interrupt-cells = <2>;

		};

	};



	spmi_bus: qcom,spmi@1c40000 {

		compatible = "qcom,spmi-pmic-arb";

		reg = <0x1c40000 0x1100>,

			<0x1e00000 0x2000000>,

			<0x3e00000 0x100000>,

			<0x3f00000 0xa0000>,

			<0x1c0a000 0x26000>;

		reg-names = "core", "chnls", "obsrvr", "intr", "cnfg";

		interrupt-names = "periph_irq";

		interrupts = <GIC_SPI 183 IRQ_TYPE_LEVEL_HIGH>;

		qcom,ee = <0>;

		qcom,channel = <0>;

		#address-cells = <1>;

		#size-cells = <1>;

		interrupt-controller;

		#interrupt-cells = <4>;

		cell-index = <0>;

	};

};



#include "scuba-coresight.dtsi"