Loading Documentation/devicetree/bindings/dma/apm-xgene-dma.txt +1 −1 Original line number Original line Diff line number Diff line Loading @@ -35,7 +35,7 @@ Example: device_type = "dma"; device_type = "dma"; reg = <0x0 0x1f270000 0x0 0x10000>, reg = <0x0 0x1f270000 0x0 0x10000>, <0x0 0x1f200000 0x0 0x10000>, <0x0 0x1f200000 0x0 0x10000>, <0x0 0x1b008000 0x0 0x2000>, <0x0 0x1b000000 0x0 0x400000>, <0x0 0x1054a000 0x0 0x100>; <0x0 0x1054a000 0x0 0x100>; interrupts = <0x0 0x82 0x4>, interrupts = <0x0 0x82 0x4>, <0x0 0xb8 0x4>, <0x0 0xb8 0x4>, Loading Documentation/devicetree/bindings/power/opp.txt→Documentation/devicetree/bindings/opp/opp.txt +20 −20 Original line number Original line Diff line number Diff line Loading @@ -88,7 +88,7 @@ This defines voltage-current-frequency combinations along with other related properties. properties. Required properties: Required properties: - opp-hz: Frequency in Hz - opp-hz: Frequency in Hz, expressed as a 64-bit big-endian integer. Optional properties: Optional properties: - opp-microvolt: voltage in micro Volts. - opp-microvolt: voltage in micro Volts. Loading Loading @@ -158,20 +158,20 @@ Example 1: Single cluster Dual-core ARM cortex A9, switch DVFS states together. opp-shared; opp-shared; opp00 { opp00 { opp-hz = <1000000000>; opp-hz = /bits/ 64 <1000000000>; opp-microvolt = <970000 975000 985000>; opp-microvolt = <970000 975000 985000>; opp-microamp = <70000>; opp-microamp = <70000>; clock-latency-ns = <300000>; clock-latency-ns = <300000>; opp-suspend; opp-suspend; }; }; opp01 { opp01 { opp-hz = <1100000000>; opp-hz = /bits/ 64 <1100000000>; opp-microvolt = <980000 1000000 1010000>; opp-microvolt = <980000 1000000 1010000>; opp-microamp = <80000>; opp-microamp = <80000>; clock-latency-ns = <310000>; clock-latency-ns = <310000>; }; }; opp02 { opp02 { opp-hz = <1200000000>; opp-hz = /bits/ 64 <1200000000>; opp-microvolt = <1025000>; opp-microvolt = <1025000>; clock-latency-ns = <290000>; clock-latency-ns = <290000>; turbo-mode; turbo-mode; Loading Loading @@ -237,20 +237,20 @@ independently. */ */ opp00 { opp00 { opp-hz = <1000000000>; opp-hz = /bits/ 64 <1000000000>; opp-microvolt = <970000 975000 985000>; opp-microvolt = <970000 975000 985000>; opp-microamp = <70000>; opp-microamp = <70000>; clock-latency-ns = <300000>; clock-latency-ns = <300000>; opp-suspend; opp-suspend; }; }; opp01 { opp01 { opp-hz = <1100000000>; opp-hz = /bits/ 64 <1100000000>; opp-microvolt = <980000 1000000 1010000>; opp-microvolt = <980000 1000000 1010000>; opp-microamp = <80000>; opp-microamp = <80000>; clock-latency-ns = <310000>; clock-latency-ns = <310000>; }; }; opp02 { opp02 { opp-hz = <1200000000>; opp-hz = /bits/ 64 <1200000000>; opp-microvolt = <1025000>; opp-microvolt = <1025000>; opp-microamp = <90000; opp-microamp = <90000; lock-latency-ns = <290000>; lock-latency-ns = <290000>; Loading Loading @@ -313,20 +313,20 @@ DVFS state together. opp-shared; opp-shared; opp00 { opp00 { opp-hz = <1000000000>; opp-hz = /bits/ 64 <1000000000>; opp-microvolt = <970000 975000 985000>; opp-microvolt = <970000 975000 985000>; opp-microamp = <70000>; opp-microamp = <70000>; clock-latency-ns = <300000>; clock-latency-ns = <300000>; opp-suspend; opp-suspend; }; }; opp01 { opp01 { opp-hz = <1100000000>; opp-hz = /bits/ 64 <1100000000>; opp-microvolt = <980000 1000000 1010000>; opp-microvolt = <980000 1000000 1010000>; opp-microamp = <80000>; opp-microamp = <80000>; clock-latency-ns = <310000>; clock-latency-ns = <310000>; }; }; opp02 { opp02 { opp-hz = <1200000000>; opp-hz = /bits/ 64 <1200000000>; opp-microvolt = <1025000>; opp-microvolt = <1025000>; opp-microamp = <90000>; opp-microamp = <90000>; clock-latency-ns = <290000>; clock-latency-ns = <290000>; Loading @@ -339,20 +339,20 @@ DVFS state together. opp-shared; opp-shared; opp10 { opp10 { opp-hz = <1300000000>; opp-hz = /bits/ 64 <1300000000>; opp-microvolt = <1045000 1050000 1055000>; opp-microvolt = <1045000 1050000 1055000>; opp-microamp = <95000>; opp-microamp = <95000>; clock-latency-ns = <400000>; clock-latency-ns = <400000>; opp-suspend; opp-suspend; }; }; opp11 { opp11 { opp-hz = <1400000000>; opp-hz = /bits/ 64 <1400000000>; opp-microvolt = <1075000>; opp-microvolt = <1075000>; opp-microamp = <100000>; opp-microamp = <100000>; clock-latency-ns = <400000>; clock-latency-ns = <400000>; }; }; opp12 { opp12 { opp-hz = <1500000000>; opp-hz = /bits/ 64 <1500000000>; opp-microvolt = <1010000 1100000 1110000>; opp-microvolt = <1010000 1100000 1110000>; opp-microamp = <95000>; opp-microamp = <95000>; clock-latency-ns = <400000>; clock-latency-ns = <400000>; Loading @@ -379,7 +379,7 @@ Example 4: Handling multiple regulators opp-shared; opp-shared; opp00 { opp00 { opp-hz = <1000000000>; opp-hz = /bits/ 64 <1000000000>; opp-microvolt = <970000>, /* Supply 0 */ opp-microvolt = <970000>, /* Supply 0 */ <960000>, /* Supply 1 */ <960000>, /* Supply 1 */ <960000>; /* Supply 2 */ <960000>; /* Supply 2 */ Loading @@ -392,7 +392,7 @@ Example 4: Handling multiple regulators /* OR */ /* OR */ opp00 { opp00 { opp-hz = <1000000000>; opp-hz = /bits/ 64 <1000000000>; opp-microvolt = <970000 975000 985000>, /* Supply 0 */ opp-microvolt = <970000 975000 985000>, /* Supply 0 */ <960000 965000 975000>, /* Supply 1 */ <960000 965000 975000>, /* Supply 1 */ <960000 965000 975000>; /* Supply 2 */ <960000 965000 975000>; /* Supply 2 */ Loading @@ -405,7 +405,7 @@ Example 4: Handling multiple regulators /* OR */ /* OR */ opp00 { opp00 { opp-hz = <1000000000>; opp-hz = /bits/ 64 <1000000000>; opp-microvolt = <970000 975000 985000>, /* Supply 0 */ opp-microvolt = <970000 975000 985000>, /* Supply 0 */ <960000 965000 975000>, /* Supply 1 */ <960000 965000 975000>, /* Supply 1 */ <960000 965000 975000>; /* Supply 2 */ <960000 965000 975000>; /* Supply 2 */ Loading Loading @@ -437,12 +437,12 @@ Example 5: Multiple OPP tables opp-shared; opp-shared; opp00 { opp00 { opp-hz = <600000000>; opp-hz = /bits/ 64 <600000000>; ... ... }; }; opp01 { opp01 { opp-hz = <800000000>; opp-hz = /bits/ 64 <800000000>; ... ... }; }; }; }; Loading @@ -453,12 +453,12 @@ Example 5: Multiple OPP tables opp-shared; opp-shared; opp10 { opp10 { opp-hz = <1000000000>; opp-hz = /bits/ 64 <1000000000>; ... ... }; }; opp11 { opp11 { opp-hz = <1100000000>; opp-hz = /bits/ 64 <1100000000>; ... ... }; }; }; }; Loading Documentation/devicetree/bindings/sound/mt8173-max98090.txt +2 −0 Original line number Original line Diff line number Diff line Loading @@ -3,11 +3,13 @@ MT8173 with MAX98090 CODEC Required properties: Required properties: - compatible : "mediatek,mt8173-max98090" - compatible : "mediatek,mt8173-max98090" - mediatek,audio-codec: the phandle of the MAX98090 audio codec - mediatek,audio-codec: the phandle of the MAX98090 audio codec - mediatek,platform: the phandle of MT8173 ASoC platform Example: Example: sound { sound { compatible = "mediatek,mt8173-max98090"; compatible = "mediatek,mt8173-max98090"; mediatek,audio-codec = <&max98090>; mediatek,audio-codec = <&max98090>; mediatek,platform = <&afe>; }; }; Documentation/devicetree/bindings/sound/mt8173-rt5650-rt5676.txt +2 −0 Original line number Original line Diff line number Diff line Loading @@ -3,11 +3,13 @@ MT8173 with RT5650 RT5676 CODECS Required properties: Required properties: - compatible : "mediatek,mt8173-rt5650-rt5676" - compatible : "mediatek,mt8173-rt5650-rt5676" - mediatek,audio-codec: the phandles of rt5650 and rt5676 codecs - mediatek,audio-codec: the phandles of rt5650 and rt5676 codecs - mediatek,platform: the phandle of MT8173 ASoC platform Example: Example: sound { sound { compatible = "mediatek,mt8173-rt5650-rt5676"; compatible = "mediatek,mt8173-rt5650-rt5676"; mediatek,audio-codec = <&rt5650 &rt5676>; mediatek,audio-codec = <&rt5650 &rt5676>; mediatek,platform = <&afe>; }; }; Documentation/devicetree/bindings/spi/spi-ath79.txt +3 −3 Original line number Original line Diff line number Diff line Loading @@ -3,7 +3,7 @@ Binding for Qualcomm Atheros AR7xxx/AR9xxx SPI controller Required properties: Required properties: - compatible: has to be "qca,<soc-type>-spi", "qca,ar7100-spi" as fallback. - compatible: has to be "qca,<soc-type>-spi", "qca,ar7100-spi" as fallback. - reg: Base address and size of the controllers memory area - reg: Base address and size of the controllers memory area - clocks: phandle to the AHB clock. - clocks: phandle of the AHB clock. - clock-names: has to be "ahb". - clock-names: has to be "ahb". - #address-cells: <1>, as required by generic SPI binding. - #address-cells: <1>, as required by generic SPI binding. - #size-cells: <0>, also as required by generic SPI binding. - #size-cells: <0>, also as required by generic SPI binding. Loading @@ -12,9 +12,9 @@ Child nodes as per the generic SPI binding. Example: Example: spi@1F000000 { spi@1f000000 { compatible = "qca,ar9132-spi", "qca,ar7100-spi"; compatible = "qca,ar9132-spi", "qca,ar7100-spi"; reg = <0x1F000000 0x10>; reg = <0x1f000000 0x10>; clocks = <&pll 2>; clocks = <&pll 2>; clock-names = "ahb"; clock-names = "ahb"; Loading Loading
Documentation/devicetree/bindings/dma/apm-xgene-dma.txt +1 −1 Original line number Original line Diff line number Diff line Loading @@ -35,7 +35,7 @@ Example: device_type = "dma"; device_type = "dma"; reg = <0x0 0x1f270000 0x0 0x10000>, reg = <0x0 0x1f270000 0x0 0x10000>, <0x0 0x1f200000 0x0 0x10000>, <0x0 0x1f200000 0x0 0x10000>, <0x0 0x1b008000 0x0 0x2000>, <0x0 0x1b000000 0x0 0x400000>, <0x0 0x1054a000 0x0 0x100>; <0x0 0x1054a000 0x0 0x100>; interrupts = <0x0 0x82 0x4>, interrupts = <0x0 0x82 0x4>, <0x0 0xb8 0x4>, <0x0 0xb8 0x4>, Loading
Documentation/devicetree/bindings/power/opp.txt→Documentation/devicetree/bindings/opp/opp.txt +20 −20 Original line number Original line Diff line number Diff line Loading @@ -88,7 +88,7 @@ This defines voltage-current-frequency combinations along with other related properties. properties. Required properties: Required properties: - opp-hz: Frequency in Hz - opp-hz: Frequency in Hz, expressed as a 64-bit big-endian integer. Optional properties: Optional properties: - opp-microvolt: voltage in micro Volts. - opp-microvolt: voltage in micro Volts. Loading Loading @@ -158,20 +158,20 @@ Example 1: Single cluster Dual-core ARM cortex A9, switch DVFS states together. opp-shared; opp-shared; opp00 { opp00 { opp-hz = <1000000000>; opp-hz = /bits/ 64 <1000000000>; opp-microvolt = <970000 975000 985000>; opp-microvolt = <970000 975000 985000>; opp-microamp = <70000>; opp-microamp = <70000>; clock-latency-ns = <300000>; clock-latency-ns = <300000>; opp-suspend; opp-suspend; }; }; opp01 { opp01 { opp-hz = <1100000000>; opp-hz = /bits/ 64 <1100000000>; opp-microvolt = <980000 1000000 1010000>; opp-microvolt = <980000 1000000 1010000>; opp-microamp = <80000>; opp-microamp = <80000>; clock-latency-ns = <310000>; clock-latency-ns = <310000>; }; }; opp02 { opp02 { opp-hz = <1200000000>; opp-hz = /bits/ 64 <1200000000>; opp-microvolt = <1025000>; opp-microvolt = <1025000>; clock-latency-ns = <290000>; clock-latency-ns = <290000>; turbo-mode; turbo-mode; Loading Loading @@ -237,20 +237,20 @@ independently. */ */ opp00 { opp00 { opp-hz = <1000000000>; opp-hz = /bits/ 64 <1000000000>; opp-microvolt = <970000 975000 985000>; opp-microvolt = <970000 975000 985000>; opp-microamp = <70000>; opp-microamp = <70000>; clock-latency-ns = <300000>; clock-latency-ns = <300000>; opp-suspend; opp-suspend; }; }; opp01 { opp01 { opp-hz = <1100000000>; opp-hz = /bits/ 64 <1100000000>; opp-microvolt = <980000 1000000 1010000>; opp-microvolt = <980000 1000000 1010000>; opp-microamp = <80000>; opp-microamp = <80000>; clock-latency-ns = <310000>; clock-latency-ns = <310000>; }; }; opp02 { opp02 { opp-hz = <1200000000>; opp-hz = /bits/ 64 <1200000000>; opp-microvolt = <1025000>; opp-microvolt = <1025000>; opp-microamp = <90000; opp-microamp = <90000; lock-latency-ns = <290000>; lock-latency-ns = <290000>; Loading Loading @@ -313,20 +313,20 @@ DVFS state together. opp-shared; opp-shared; opp00 { opp00 { opp-hz = <1000000000>; opp-hz = /bits/ 64 <1000000000>; opp-microvolt = <970000 975000 985000>; opp-microvolt = <970000 975000 985000>; opp-microamp = <70000>; opp-microamp = <70000>; clock-latency-ns = <300000>; clock-latency-ns = <300000>; opp-suspend; opp-suspend; }; }; opp01 { opp01 { opp-hz = <1100000000>; opp-hz = /bits/ 64 <1100000000>; opp-microvolt = <980000 1000000 1010000>; opp-microvolt = <980000 1000000 1010000>; opp-microamp = <80000>; opp-microamp = <80000>; clock-latency-ns = <310000>; clock-latency-ns = <310000>; }; }; opp02 { opp02 { opp-hz = <1200000000>; opp-hz = /bits/ 64 <1200000000>; opp-microvolt = <1025000>; opp-microvolt = <1025000>; opp-microamp = <90000>; opp-microamp = <90000>; clock-latency-ns = <290000>; clock-latency-ns = <290000>; Loading @@ -339,20 +339,20 @@ DVFS state together. opp-shared; opp-shared; opp10 { opp10 { opp-hz = <1300000000>; opp-hz = /bits/ 64 <1300000000>; opp-microvolt = <1045000 1050000 1055000>; opp-microvolt = <1045000 1050000 1055000>; opp-microamp = <95000>; opp-microamp = <95000>; clock-latency-ns = <400000>; clock-latency-ns = <400000>; opp-suspend; opp-suspend; }; }; opp11 { opp11 { opp-hz = <1400000000>; opp-hz = /bits/ 64 <1400000000>; opp-microvolt = <1075000>; opp-microvolt = <1075000>; opp-microamp = <100000>; opp-microamp = <100000>; clock-latency-ns = <400000>; clock-latency-ns = <400000>; }; }; opp12 { opp12 { opp-hz = <1500000000>; opp-hz = /bits/ 64 <1500000000>; opp-microvolt = <1010000 1100000 1110000>; opp-microvolt = <1010000 1100000 1110000>; opp-microamp = <95000>; opp-microamp = <95000>; clock-latency-ns = <400000>; clock-latency-ns = <400000>; Loading @@ -379,7 +379,7 @@ Example 4: Handling multiple regulators opp-shared; opp-shared; opp00 { opp00 { opp-hz = <1000000000>; opp-hz = /bits/ 64 <1000000000>; opp-microvolt = <970000>, /* Supply 0 */ opp-microvolt = <970000>, /* Supply 0 */ <960000>, /* Supply 1 */ <960000>, /* Supply 1 */ <960000>; /* Supply 2 */ <960000>; /* Supply 2 */ Loading @@ -392,7 +392,7 @@ Example 4: Handling multiple regulators /* OR */ /* OR */ opp00 { opp00 { opp-hz = <1000000000>; opp-hz = /bits/ 64 <1000000000>; opp-microvolt = <970000 975000 985000>, /* Supply 0 */ opp-microvolt = <970000 975000 985000>, /* Supply 0 */ <960000 965000 975000>, /* Supply 1 */ <960000 965000 975000>, /* Supply 1 */ <960000 965000 975000>; /* Supply 2 */ <960000 965000 975000>; /* Supply 2 */ Loading @@ -405,7 +405,7 @@ Example 4: Handling multiple regulators /* OR */ /* OR */ opp00 { opp00 { opp-hz = <1000000000>; opp-hz = /bits/ 64 <1000000000>; opp-microvolt = <970000 975000 985000>, /* Supply 0 */ opp-microvolt = <970000 975000 985000>, /* Supply 0 */ <960000 965000 975000>, /* Supply 1 */ <960000 965000 975000>, /* Supply 1 */ <960000 965000 975000>; /* Supply 2 */ <960000 965000 975000>; /* Supply 2 */ Loading Loading @@ -437,12 +437,12 @@ Example 5: Multiple OPP tables opp-shared; opp-shared; opp00 { opp00 { opp-hz = <600000000>; opp-hz = /bits/ 64 <600000000>; ... ... }; }; opp01 { opp01 { opp-hz = <800000000>; opp-hz = /bits/ 64 <800000000>; ... ... }; }; }; }; Loading @@ -453,12 +453,12 @@ Example 5: Multiple OPP tables opp-shared; opp-shared; opp10 { opp10 { opp-hz = <1000000000>; opp-hz = /bits/ 64 <1000000000>; ... ... }; }; opp11 { opp11 { opp-hz = <1100000000>; opp-hz = /bits/ 64 <1100000000>; ... ... }; }; }; }; Loading
Documentation/devicetree/bindings/sound/mt8173-max98090.txt +2 −0 Original line number Original line Diff line number Diff line Loading @@ -3,11 +3,13 @@ MT8173 with MAX98090 CODEC Required properties: Required properties: - compatible : "mediatek,mt8173-max98090" - compatible : "mediatek,mt8173-max98090" - mediatek,audio-codec: the phandle of the MAX98090 audio codec - mediatek,audio-codec: the phandle of the MAX98090 audio codec - mediatek,platform: the phandle of MT8173 ASoC platform Example: Example: sound { sound { compatible = "mediatek,mt8173-max98090"; compatible = "mediatek,mt8173-max98090"; mediatek,audio-codec = <&max98090>; mediatek,audio-codec = <&max98090>; mediatek,platform = <&afe>; }; };
Documentation/devicetree/bindings/sound/mt8173-rt5650-rt5676.txt +2 −0 Original line number Original line Diff line number Diff line Loading @@ -3,11 +3,13 @@ MT8173 with RT5650 RT5676 CODECS Required properties: Required properties: - compatible : "mediatek,mt8173-rt5650-rt5676" - compatible : "mediatek,mt8173-rt5650-rt5676" - mediatek,audio-codec: the phandles of rt5650 and rt5676 codecs - mediatek,audio-codec: the phandles of rt5650 and rt5676 codecs - mediatek,platform: the phandle of MT8173 ASoC platform Example: Example: sound { sound { compatible = "mediatek,mt8173-rt5650-rt5676"; compatible = "mediatek,mt8173-rt5650-rt5676"; mediatek,audio-codec = <&rt5650 &rt5676>; mediatek,audio-codec = <&rt5650 &rt5676>; mediatek,platform = <&afe>; }; };
Documentation/devicetree/bindings/spi/spi-ath79.txt +3 −3 Original line number Original line Diff line number Diff line Loading @@ -3,7 +3,7 @@ Binding for Qualcomm Atheros AR7xxx/AR9xxx SPI controller Required properties: Required properties: - compatible: has to be "qca,<soc-type>-spi", "qca,ar7100-spi" as fallback. - compatible: has to be "qca,<soc-type>-spi", "qca,ar7100-spi" as fallback. - reg: Base address and size of the controllers memory area - reg: Base address and size of the controllers memory area - clocks: phandle to the AHB clock. - clocks: phandle of the AHB clock. - clock-names: has to be "ahb". - clock-names: has to be "ahb". - #address-cells: <1>, as required by generic SPI binding. - #address-cells: <1>, as required by generic SPI binding. - #size-cells: <0>, also as required by generic SPI binding. - #size-cells: <0>, also as required by generic SPI binding. Loading @@ -12,9 +12,9 @@ Child nodes as per the generic SPI binding. Example: Example: spi@1F000000 { spi@1f000000 { compatible = "qca,ar9132-spi", "qca,ar7100-spi"; compatible = "qca,ar9132-spi", "qca,ar7100-spi"; reg = <0x1F000000 0x10>; reg = <0x1f000000 0x10>; clocks = <&pll 2>; clocks = <&pll 2>; clock-names = "ahb"; clock-names = "ahb"; Loading