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Commit 0eb3ea34 authored by Sarthak Garg's avatar Sarthak Garg Committed by Gerrit - the friendly Code Review server
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mmc: sdhci_msm: Adding logs for core and iface clock 



Adding logs to know if getting and enabling iface and core clocks
succeeded or not.

Change-Id: I670590219b4ba0fab9c100b265d4640b0eb83262
Signed-off-by: default avatarSarthak Garg <sartgarg@codeaurora.org>
parent b39b9019

drivers/mmc/host/sdhci-msm.c

+11 −3
Original line number Diff line number Diff line
@@ -5090,9 +5090,15 @@ static int sdhci_msm_probe(struct platform_device *pdev) 
	msm_host->pclk = devm_clk_get(&pdev->dev, "iface_clk");

	if (!IS_ERR(msm_host->pclk)) {

		ret = clk_prepare_enable(msm_host->pclk);

		if (ret)

		if (ret) {

			dev_err(&pdev->dev, "Iface clk not enabled (%d)\n"

					, ret);

			goto bus_clk_disable;

		}

	} else {

		ret = PTR_ERR(msm_host->pclk);

		dev_err(&pdev->dev, "Iface clk get failed (%d)\n", ret);

	}

	atomic_set(&msm_host->controller_clock, 1);



	/* Setup SDC ufs bus aggr clock */
@@ -5113,6 +5119,7 @@ static int sdhci_msm_probe(struct platform_device *pdev) 
	msm_host->clk = devm_clk_get(&pdev->dev, "core_clk");

	if (IS_ERR(msm_host->clk)) {

		ret = PTR_ERR(msm_host->clk);

		dev_err(&pdev->dev, "Core clk get failed (%d)\n", ret);

		goto bus_aggr_clk_disable;

	}
@@ -5123,9 +5130,10 @@ static int sdhci_msm_probe(struct platform_device *pdev) 
		goto bus_aggr_clk_disable;

	}

	ret = clk_prepare_enable(msm_host->clk);

	if (ret)

	if (ret) {

		dev_err(&pdev->dev, "Core clk not enabled (%d)\n", ret);

		goto bus_aggr_clk_disable;



	}

	msm_host->clk_rate = sdhci_msm_get_min_clock(host);

	atomic_set(&msm_host->clks_on, 1);