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Commit 0e065c79 authored by Archit Taneja's avatar Archit Taneja Committed by Tomi Valkeinen
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OMAPDSS: DISPC: Remove dispc_mgr_set_pol_freq() 



dispc_mgr_set_pol_freq() configures the fields in the register DISPC_POL_FREQo.
All these fields have been moved to omap_video_timings struct, and are now
programmed in dispc_mgr_set_lcd_timings(). These will be configured when timings
are applied via dss_mgr_set_timings().

Remove dispc_mgr_set_pol_freq() and it's calls from the interface drivers.

Signed-off-by: default avatarArchit Taneja <archit@ti.com>
parent 655e2941

drivers/video/omap2/dss/dispc.c

+0 −29
Original line number Diff line number Diff line
@@ -3165,35 +3165,6 @@ static void dispc_dump_regs(struct seq_file *s) 
#undef DUMPREG

}



static void _dispc_mgr_set_pol_freq(enum omap_channel channel, bool onoff,

		bool rf, bool ieo, bool ipc, bool ihs, bool ivs)

{

	u32 l = 0;



	DSSDBG("onoff %d rf %d ieo %d ipc %d ihs %d ivs %d\n",

			onoff, rf, ieo, ipc, ihs, ivs);



	l |= FLD_VAL(onoff, 17, 17);

	l |= FLD_VAL(rf, 16, 16);

	l |= FLD_VAL(ieo, 15, 15);

	l |= FLD_VAL(ipc, 14, 14);

	l |= FLD_VAL(ihs, 13, 13);

	l |= FLD_VAL(ivs, 12, 12);



	dispc_write_reg(DISPC_POL_FREQ(channel), l);

}



void dispc_mgr_set_pol_freq(enum omap_channel channel,

		enum omap_panel_config config)

{

	_dispc_mgr_set_pol_freq(channel, (config & OMAP_DSS_LCD_ONOFF) != 0,

			(config & OMAP_DSS_LCD_RF) != 0,

			(config & OMAP_DSS_LCD_IEO) != 0,

			(config & OMAP_DSS_LCD_IPC) != 0,

			(config & OMAP_DSS_LCD_IHS) != 0,

			(config & OMAP_DSS_LCD_IVS) != 0);

}



/* with fck as input clock rate, find dispc dividers that produce req_pck */

void dispc_find_clk_divs(unsigned long req_pck, unsigned long fck,

		struct dispc_clock_info *cinfo)

drivers/video/omap2/dss/dpi.c

+0 −2
Original line number Diff line number Diff line
@@ -131,8 +131,6 @@ static int dpi_set_mode(struct omap_dss_device *dssdev) 
	unsigned long pck;

	int r = 0;



	dispc_mgr_set_pol_freq(dssdev->manager->id, dssdev->panel.config);



	if (dpi_use_dsi_pll(dssdev))

		r = dpi_set_dsi_clk(dssdev, t->pixel_clock * 1000, &fck,

				&lck_div, &pck_div);

drivers/video/omap2/dss/dss.h

+0 −2
Original line number Diff line number Diff line
@@ -423,8 +423,6 @@ void dispc_mgr_set_tft_data_lines(enum omap_channel channel, u8 data_lines); 
void dispc_mgr_set_lcd_type_tft(enum omap_channel channel);

void dispc_mgr_set_timings(enum omap_channel channel,

		struct omap_video_timings *timings);

void dispc_mgr_set_pol_freq(enum omap_channel channel,

		enum omap_panel_config config);

unsigned long dispc_mgr_lclk_rate(enum omap_channel channel);

unsigned long dispc_mgr_pclk_rate(enum omap_channel channel);

unsigned long dispc_core_clk_rate(void);

drivers/video/omap2/dss/sdi.c

+0 −2
Original line number Diff line number Diff line
@@ -83,8 +83,6 @@ int omapdss_sdi_display_enable(struct omap_dss_device *dssdev) 
	dssdev->panel.timings.data_pclk_edge = OMAPDSS_DRIVE_SIG_RISING_EDGE;

	dssdev->panel.timings.sync_pclk_edge = OMAPDSS_DRIVE_SIG_RISING_EDGE;



	dispc_mgr_set_pol_freq(dssdev->manager->id, dssdev->panel.config);



	r = dss_calc_clock_div(t->pixel_clock * 1000, &dss_cinfo, &dispc_cinfo);

	if (r)

		goto err_calc_clock_div;