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Commit 0d93f8d1 authored by Bjorn Helgaas's avatar Bjorn Helgaas
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PCI: artpec6: Use generic DesignWare accessors 



The dw_pcie_readl_rc() and dw_pcie_writel_rc() interfaces already add in
pp->dbi_base, so use those instead of doing it ourselves in the armada8k
driver.  No functional change intended.

Signed-off-by: default avatarBjorn Helgaas <bhelgaas@google.com>
Acked-by: default avatarJesper Nilsson <jesper.nilsson@axis.com>
parent 26fbcc5a

drivers/pci/host/pcie-artpec6.c

+3 −3
Original line number Diff line number Diff line
@@ -139,7 +139,7 @@ static int artpec6_pcie_establish_link(struct pcie_port *pp) 
	 * Enable writing to config regs. This is required as the Synopsys

	 * driver changes the class code. That register needs DBI write enable.

	 */

	writel(DBI_RO_WR_EN, pp->dbi_base + MISC_CONTROL_1_OFF);

	dw_pcie_writel_rc(pp, MISC_CONTROL_1_OFF, DBI_RO_WR_EN);



	pp->io_base &= ARTPEC6_CPU_TO_BUS_ADDR;

	pp->mem_base &= ARTPEC6_CPU_TO_BUS_ADDR;
@@ -159,8 +159,8 @@ static int artpec6_pcie_establish_link(struct pcie_port *pp) 
		return 0;



	dev_dbg(pp->dev, "DEBUG_R0: 0x%08x, DEBUG_R1: 0x%08x\n",

		readl(pp->dbi_base + PCIE_PHY_DEBUG_R0),

		readl(pp->dbi_base + PCIE_PHY_DEBUG_R1));

		dw_pcie_readl_rc(pp, PCIE_PHY_DEBUG_R0),

		dw_pcie_readl_rc(pp, PCIE_PHY_DEBUG_R1));



	return -ETIMEDOUT;

}