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Commit 0d018d73 authored by Stefan Agner's avatar Stefan Agner Committed by Shawn Guo
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ARM: dts: vf610: add system reset controller and syscon-reboot



Add the system reset controller (SRC) module and use syscon-reboot
to register a restart handler which restarts the SoC using the
SRC SW_RST bit.

Signed-off-by: default avatarStefan Agner <stefan@agner.ch>
Signed-off-by: default avatarShawn Guo <shawn.guo@linaro.org>
parent 71946619
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+4 −0
Original line number Diff line number Diff line
@@ -130,6 +130,10 @@
	interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
};

&src {
	interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
};

&uart0 {
	interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>;
};
+12 −0
Original line number Diff line number Diff line
@@ -43,6 +43,13 @@
		clock-frequency = <32768>;
	};

	reboot: syscon-reboot {
		compatible = "syscon-reboot";
		regmap = <&src>;
		offset = <0x0>;
		mask = <0x1000>;
	};

	soc {
		#address-cells = <1>;
		#size-cells = <1>;
@@ -318,6 +325,11 @@
				clocks = <&clks VF610_CLK_USBC0>;
				status = "disabled";
			};

			src: src@4006e000 {
				compatible = "fsl,vf610-src", "syscon";
				reg = <0x4006e000 0x1000>;
			};
		};

		aips1: aips-bus@40080000 {