Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 0ca6e000 authored by David S. Miller's avatar David S. Miller
Browse files

Merge branch 'ns2-amac' 



Jon Mason says:

====================
add NS2 support to bgmac

Changes in v6:
* Use a common bgmac_phy_connect_direct (per Rafal Milecki)
* Rebased on latest net-next
* Added Reviewed-by to the relevant patches

Changes in v5:
* Change a pr_err to netdev_err (per Scott Branden)
* Reword the lane swap binding documentation (per Andrew Lunn)

Changes in v4:
* Actually send out the lane swap binding doc patch (Per Scott Branden)
* Remove unused #define (Per Andrew Lunn)

Changes in v3:
* Clean-up the bgmac DT binding doc (per Rob Herring)
* Document the lane swap binding and make it generic (Per Andrew Lunn)

Changes in v2:
* Remove the PHY power-on (per Andrew Lunn)
* Misc PHY clean-ups regarding comments and #defines (per Andrew Lunn)
  This results on none of the original PHY code from Vikas being
  present.  So, I'm removing him as an author and giving him
  "Inspired-by" credit.
* Move PHY lane swapping to PHY driver (per Andrew Lunn and Florian
  Fainelli)
* Remove bgmac sleep (per Florian Fainelli)
* Re-add bgmac chip reset (per Florian Fainelli and Ray Jui)
* Rebased on latest net-next
* Added patch for bcm54xx_auxctl_read, which is used in the BCM54810
====================

Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parents 94edc86b dddc3c9d

Documentation/devicetree/bindings/net/brcm,amac.txt

+11 −5
Original line number Diff line number Diff line
@@ -2,11 +2,17 @@ Broadcom AMAC Ethernet Controller Device Tree Bindings 
-------------------------------------------------------------



Required properties:

 - compatible:	"brcm,amac" or "brcm,nsp-amac"

 - reg:		Address and length of the GMAC registers,

		Address and length of the GMAC IDM registers

 - reg-names:	Names of the registers.  Must have both "amac_base" and

		"idm_base"

 - compatible:	"brcm,amac"

		"brcm,nsp-amac"

		"brcm,ns2-amac"

 - reg:		Address and length of the register set for the device. It

		contains the information of registers in the same order as

		described by reg-names

 - reg-names:	Names of the registers.

		"amac_base":	Address and length of the GMAC registers

		"idm_base":	Address and length of the GMAC IDM registers

		"nicpm_base":	Address and length of the NIC Port Manager

				registers (required for Northstar2)

 - interrupts:	Interrupt number



Optional properties:

Documentation/devicetree/bindings/net/phy.txt

+4 −0
Original line number Diff line number Diff line
@@ -35,6 +35,10 @@ Optional Properties: 
- broken-turn-around: If set, indicates the PHY device does not correctly

  release the turn around line low at the end of a MDIO transaction.



- enet-phy-lane-swap: If set, indicates the PHY will swap the TX/RX lanes to

  compensate for the board being designed with the lanes swapped.





Example:



ethernet-phy@0 {

arch/arm64/boot/dts/broadcom/ns2-svk.dts

+5 −0
Original line number Diff line number Diff line
@@ -56,6 +56,10 @@ 
	};

};



&enet {

	status = "ok";

};



&pci_phy0 {

	status = "ok";

};
@@ -174,6 +178,7 @@ 
&mdio_mux_iproc {

	mdio@10 {

		gphy0: eth-phy@10 {

			enet-phy-lane-swap;

			reg = <0x10>;

		};

	};

arch/arm64/boot/dts/broadcom/ns2.dtsi

+12 −0
Original line number Diff line number Diff line
@@ -191,6 +191,18 @@ 


		#include "ns2-clock.dtsi"



		enet: ethernet@61000000 {

			compatible = "brcm,ns2-amac";

			reg = <0x61000000 0x1000>,

			      <0x61090000 0x1000>,

			      <0x61030000 0x100>;

			reg-names = "amac_base", "idm_base", "nicpm_base";

			interrupts = <GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH>;

			phy-handle = <&gphy0>;

			phy-mode = "rgmii";

			status = "disabled";

		};



		dma0: dma@61360000 {

			compatible = "arm,pl330", "arm,primecell";

			reg = <0x61360000 0x1000>;

drivers/net/ethernet/broadcom/bgmac-bcma.c

+22 −0
Original line number Diff line number Diff line
@@ -80,6 +80,24 @@ static void bcma_bgmac_cmn_maskset32(struct bgmac *bgmac, u16 offset, u32 mask, 
	bcma_maskset32(bgmac->bcma.cmn, offset, mask, set);

}



static int bcma_phy_connect(struct bgmac *bgmac)

{

	struct phy_device *phy_dev;

	char bus_id[MII_BUS_ID_SIZE + 3];



	/* Connect to the PHY */

	snprintf(bus_id, sizeof(bus_id), PHY_ID_FMT, bgmac->mii_bus->id,

		 bgmac->phyaddr);

	phy_dev = phy_connect(bgmac->net_dev, bus_id, bgmac_adjust_link,

			      PHY_INTERFACE_MODE_MII);

	if (IS_ERR(phy_dev)) {

		dev_err(bgmac->dev, "PHY connection failed\n");

		return PTR_ERR(phy_dev);

	}



	return 0;

}



static const struct bcma_device_id bgmac_bcma_tbl[] = {

	BCMA_CORE(BCMA_MANUF_BCM, BCMA_CORE_4706_MAC_GBIT,

		  BCMA_ANY_REV, BCMA_ANY_CLASS),
@@ -275,6 +293,10 @@ static int bgmac_probe(struct bcma_device *core) 
	bgmac->cco_ctl_maskset = bcma_bgmac_cco_ctl_maskset;

	bgmac->get_bus_clock = bcma_bgmac_get_bus_clock;

	bgmac->cmn_maskset32 = bcma_bgmac_cmn_maskset32;

	if (bgmac->mii_bus)

		bgmac->phy_connect = bcma_phy_connect;

	else

		bgmac->phy_connect = bgmac_phy_connect_direct;



	err = bgmac_enet_probe(bgmac);

	if (err)