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Commit 0be032c1 authored by Huacai Chen's avatar Huacai Chen Committed by Ralf Baechle
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MIPS: c-r4k: Fix Loongson-3's vcache/scache waysize calculation 



If scache.waysize is 0, r4k___flush_cache_all() will do nothing and
then cause bugs. BTW, though vcache.waysize isn't being used by now,
we also fix its calculation.

Signed-off-by: default avatarHuacai Chen <chenhc@lemote.com>
Cc: John Crispin <john@phrozen.org>
Cc: Steven J . Hill <Steven.Hill@caviumnetworks.com>
Cc: Fuxin Zhang <zhangfx@lemote.com>
Cc: Zhangjin Wu <wuzhangjin@gmail.com>
Cc: linux-mips@linux-mips.org
Cc: stable@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/15756/


Signed-off-by: default avatarRalf Baechle <ralf@linux-mips.org>
parent 0115f6cb

arch/mips/mm/c-r4k.c

+2 −0
Original line number Diff line number Diff line
@@ -1562,6 +1562,7 @@ static void probe_vcache(void) 
	vcache_size = c->vcache.sets * c->vcache.ways * c->vcache.linesz;



	c->vcache.waybit = 0;

	c->vcache.waysize = vcache_size / c->vcache.ways;



	pr_info("Unified victim cache %ldkB %s, linesize %d bytes.\n",

		vcache_size >> 10, way_string[c->vcache.ways], c->vcache.linesz);
@@ -1664,6 +1665,7 @@ static void __init loongson3_sc_init(void) 
	/* Loongson-3 has 4 cores, 1MB scache for each. scaches are shared */

	scache_size *= 4;

	c->scache.waybit = 0;

	c->scache.waysize = scache_size / c->scache.ways;

	pr_info("Unified secondary cache %ldkB %s, linesize %d bytes.\n",

	       scache_size >> 10, way_string[c->scache.ways], c->scache.linesz);

	if (scache_size)