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Commit 09a1de04 authored by Srinivas Pandruvada's avatar Srinivas Pandruvada Committed by Wolfram Sang
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i2c: i801: Add support for Intel Cannon Lake 



Added SMBUS PCI Ids for SMBUS for Cannon Lake PCH.

Signed-off-by: default avatarSrinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
[jarkko.nikula@linux.intel.com: Add entries to Documentation and Kconfig.
Cover Cannon Lake-H too]
Signed-off-by: default avatarJarkko Nikula <jarkko.nikula@linux.intel.com>
Signed-off-by: default avatarWolfram Sang <wsa@the-dreams.de>
parent 063345ae

Documentation/i2c/busses/i2c-i801

+2 −0
Original line number Diff line number Diff line
@@ -34,6 +34,8 @@ Supported adapters: 
  * Intel Broxton (SOC)

  * Intel Lewisburg (PCH)

  * Intel Gemini Lake (SOC)

  * Intel Cannon Lake-H (PCH)

  * Intel Cannon Lake-LP (PCH)

   Datasheets: Publicly available at the Intel website



On Intel Patsburg and later chipsets, both the normal host SMBus controller

drivers/i2c/busses/Kconfig

+2 −0
Original line number Diff line number Diff line
@@ -129,6 +129,8 @@ config I2C_I801 
	    Broxton (SOC)

	    Lewisburg (PCH)

	    Gemini Lake (SOC)

	    Cannon Lake-H (PCH)

	    Cannon Lake-LP (PCH)



	  This driver can also be built as a module.  If so, the module

	  will be called i2c-i801.

drivers/i2c/busses/i2c-i801.c

+8 −0
Original line number Diff line number Diff line
@@ -66,6 +66,8 @@ 
 * Lewisburg Supersku (PCH)	0xa223	32	hard	yes	yes	yes

 * Kaby Lake PCH-H (PCH)	0xa2a3	32	hard	yes	yes	yes

 * Gemini Lake (SOC)		0x31d4	32	hard	yes	yes	yes

 * Cannon Lake-H (PCH)		0xa323	32	hard	yes	yes	yes

 * Cannon Lake-LP (PCH)		0x9da3	32	hard	yes	yes	yes

 *

 * Features supported by this driver:

 * Software PEC				no
@@ -226,10 +228,12 @@ 
#define PCI_DEVICE_ID_INTEL_LYNXPOINT_LP_SMBUS		0x9c22

#define PCI_DEVICE_ID_INTEL_WILDCATPOINT_LP_SMBUS	0x9ca2

#define PCI_DEVICE_ID_INTEL_SUNRISEPOINT_LP_SMBUS	0x9d23

#define PCI_DEVICE_ID_INTEL_CANNONLAKE_LP_SMBUS		0x9da3

#define PCI_DEVICE_ID_INTEL_SUNRISEPOINT_H_SMBUS	0xa123

#define PCI_DEVICE_ID_INTEL_LEWISBURG_SMBUS		0xa1a3

#define PCI_DEVICE_ID_INTEL_LEWISBURG_SSKU_SMBUS	0xa223

#define PCI_DEVICE_ID_INTEL_KABYLAKE_PCH_H_SMBUS	0xa2a3

#define PCI_DEVICE_ID_INTEL_CANNONLAKE_H_SMBUS		0xa323



struct i801_mux_config {

	char *gpio_chip;
@@ -1026,6 +1030,8 @@ static const struct pci_device_id i801_ids[] = { 
	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_LEWISBURG_SMBUS) },

	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_LEWISBURG_SSKU_SMBUS) },

	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_KABYLAKE_PCH_H_SMBUS) },

	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_CANNONLAKE_H_SMBUS) },

	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_CANNONLAKE_LP_SMBUS) },

	{ 0, }

};
@@ -1499,6 +1505,8 @@ static int i801_probe(struct pci_dev *dev, const struct pci_device_id *id) 
	switch (dev->device) {

	case PCI_DEVICE_ID_INTEL_SUNRISEPOINT_H_SMBUS:

	case PCI_DEVICE_ID_INTEL_SUNRISEPOINT_LP_SMBUS:

	case PCI_DEVICE_ID_INTEL_CANNONLAKE_H_SMBUS:

	case PCI_DEVICE_ID_INTEL_CANNONLAKE_LP_SMBUS:

	case PCI_DEVICE_ID_INTEL_LEWISBURG_SMBUS:

	case PCI_DEVICE_ID_INTEL_LEWISBURG_SSKU_SMBUS:

	case PCI_DEVICE_ID_INTEL_DNV_SMBUS: