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Commit 0945a696 authored by David Collins's avatar David Collins
Browse files

clk: qcom: add qdss_qmp_clk parent clock for Kona clock controllers 



Add parent clock qdss_qmp_clk within all clock controller drivers
for its dependent clocks.

Change-Id: I2293bff831ebd3cbb382e4ed8e5d84d5853d7081
Signed-off-by: default avatarDavid Collins <collinsd@codeaurora.org>
parent 99638f95

drivers/clk/qcom/gpucc-kona.c

+17 −1
Original line number Diff line number Diff line 
// SPDX-License-Identifier: GPL-2.0-only

/* Copyright (c) 2018, The Linux Foundation. All rights reserved.*/

/* Copyright (c) 2018-2019, The Linux Foundation. All rights reserved.*/



#define pr_fmt(fmt) "clk: %s: " fmt, __func__
@@ -186,6 +186,10 @@ static struct clk_branch gpu_cc_cx_qdss_at_clk = { 
		.enable_mask = BIT(0),

		.hw.init = &(struct clk_init_data){

			.name = "gpu_cc_cx_qdss_at_clk",

			.parent_names = (const char *[]){

				"qdss_qmp_clk",

			},

			.num_parents = 1,

			.ops = &clk_branch2_ops,

		},

	},
@@ -199,6 +203,10 @@ static struct clk_branch gpu_cc_cx_qdss_trig_clk = { 
		.enable_mask = BIT(0),

		.hw.init = &(struct clk_init_data){

			.name = "gpu_cc_cx_qdss_trig_clk",

			.parent_names = (const char *[]){

				"qdss_qmp_clk",

			},

			.num_parents = 1,

			.ops = &clk_branch2_ops,

		},

	},
@@ -212,6 +220,10 @@ static struct clk_branch gpu_cc_cx_qdss_tsctr_clk = { 
		.enable_mask = BIT(0),

		.hw.init = &(struct clk_init_data){

			.name = "gpu_cc_cx_qdss_tsctr_clk",

			.parent_names = (const char *[]){

				"qdss_qmp_clk",

			},

			.num_parents = 1,

			.ops = &clk_branch2_ops,

		},

	},
@@ -282,6 +294,10 @@ static struct clk_branch gpu_cc_gx_qdss_tsctr_clk = { 
		.enable_mask = BIT(0),

		.hw.init = &(struct clk_init_data){

			.name = "gpu_cc_gx_qdss_tsctr_clk",

			.parent_names = (const char *[]){

				"qdss_qmp_clk",

			},

			.num_parents = 1,

			.ops = &clk_branch2_ops,

		},

	},

drivers/clk/qcom/npucc-kona.c

+4 −0
Original line number Diff line number Diff line
@@ -477,6 +477,10 @@ static struct clk_branch npu_cc_atb_clk = { 
		.enable_mask = BIT(0),

		.hw.init = &(struct clk_init_data){

			.name = "npu_cc_atb_clk",

			.parent_names = (const char *[]){

				"qdss_qmp_clk",

			},

			.num_parents = 1,

			.ops = &clk_branch2_ops,

		},

	},