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Commit 08a7e621 authored by Masahiro Yamada's avatar Masahiro Yamada Committed by Linus Torvalds
Browse files

scripts/spelling.txt: add "swith" pattern and fix typo instances 

Fix typos and add the following to the scripts/spelling.txt:

  swith||switch
  swithable||switchable
  swithed||switched
  swithing||switching

While we are here, fix the "update" to "updates" in the touched hunk in
drivers/net/wireless/marvell/mwifiex/wmm.c.

Link: http://lkml.kernel.org/r/1481573103-11329-2-git-send-email-yamada.masahiro@socionext.com


Signed-off-by: default avatarMasahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: default avatarAndrew Morton <akpm@linux-foundation.org>
Signed-off-by: default avatarLinus Torvalds <torvalds@linux-foundation.org>
parent f3048d17

Documentation/devicetree/bindings/mfd/qcom-rpm.txt

+1 −1
Original line number Diff line number Diff line
@@ -234,7 +234,7 @@ see regulator.txt - with additional custom properties described below: 
- qcom,switch-mode-frequency:

	Usage: required

	Value type: <u32>

	Definition: Frequency (Hz) of the swith mode power supply;

	Definition: Frequency (Hz) of the switch mode power supply;

		    must be one of:

		    19200000, 9600000, 6400000, 4800000, 3840000, 3200000,

		    2740000, 2400000, 2130000, 1920000, 1750000, 1600000,

Documentation/devicetree/bindings/power/pd-samsung.txt

+1 −1
Original line number Diff line number Diff line
@@ -23,7 +23,7 @@ Optional Properties: 
- clock-names: The following clocks can be specified:

	- oscclk: Oscillator clock.

	- clkN: Input clocks to the devices in this power domain. These clocks

		will be reparented to oscclk before swithing power domain off.

		will be reparented to oscclk before switching power domain off.

		Their original parent will be brought back after turning on

		the domain. Maximum of 4 clocks (N = 0 to 3) are supported.

	- asbN: Clocks required by asynchronous bridges (ASB) present in

arch/arm/boot/compressed/head.S

+1 −1
Original line number Diff line number Diff line
@@ -1196,7 +1196,7 @@ skip: 
		bgt	loop1

finished:

		ldmfd	sp!, {r0-r7, r9-r11}

		mov	r10, #0			@ swith back to cache level 0

		mov	r10, #0			@ switch back to cache level 0

		mcr	p15, 2, r10, c0, c0, 0	@ select current cache level in cssr

iflush:

		mcr	p15, 0, r10, c7, c10, 4	@ DSB

arch/arm/mm/cache-v7.S

+1 −1
Original line number Diff line number Diff line
@@ -164,7 +164,7 @@ skip: 
	cmp	r3, r10

	bgt	flush_levels

finished:

	mov	r10, #0				@ swith back to cache level 0

	mov	r10, #0				@ switch back to cache level 0

	mcr	p15, 2, r10, c0, c0, 0		@ select current cache level in cssr

	dsb	st

	isb

arch/arm/mm/cache-v7m.S

+1 −1
Original line number Diff line number Diff line
@@ -217,7 +217,7 @@ skip: 
	cmp	r3, r10

	bgt	flush_levels

finished:

	mov	r10, #0				@ swith back to cache level 0

	mov	r10, #0				@ switch back to cache level 0

	write_csselr r10, r3			@ select current cache level in cssr

	dsb	st

	isb