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Commit 08805fdb authored by Wei Hu(Xavier)'s avatar Wei Hu(Xavier) Committed by Doug Ledford
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RDMA/hns: Split hw v1 driver from hns roce driver



The hardware relevant definitions and operations are implemented
in hns_roce_hw_v* file. According to the diversity chips, the file
is named as hns_roce_hw_v1.c or hns_roce_hw_v2.c etc.

The general software process flow, common structures and allocated
algorithms are implemented in other files located in hns roce driver.

In order to support the scalability of the hardware version, the
common driver features are in the hns-roce.ko, and the hardware
relevant operations are in hns_roce_hw_v1.ko or hns_roce_hw_v2.ko
based on the series chips.

Signed-off-by: default avatarLijun Ou <oulijun@huawei.com>
Signed-off-by: default avatarShaobo Xu <xushaobo2@huawei.com>
Signed-off-by: default avatarWei Hu (Xavier) <xavier.huwei@huawei.com>
Signed-off-by: default avatarDoug Ledford <dledford@redhat.com>
parent e19b205b
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+13 −2
Original line number Original line Diff line number Diff line
config INFINIBAND_HNS
config INFINIBAND_HNS
	tristate "HNS RoCE Driver"
	tristate "HNS RoCE Driver"
	depends on NET_VENDOR_HISILICON
	depends on NET_VENDOR_HISILICON
	depends on (ARM64 || (COMPILE_TEST && 64BIT)) && HNS && HNS_DSAF && HNS_ENET
	depends on ARM64 || (COMPILE_TEST && 64BIT)
	---help---
	---help---
	  This is a RoCE/RDMA driver for the Hisilicon RoCE engine. The engine
	  This is a RoCE/RDMA driver for the Hisilicon RoCE engine. The engine
	  is used in Hisilicon Hi1610 and more further ICT SoC.
	  is used in Hisilicon Hip06 and more further ICT SoC based on
	  platform device.


	  To compile this driver as a module, choose M here: the module
	  To compile this driver as a module, choose M here: the module
	  will be called hns-roce.
	  will be called hns-roce.

config INFINIBAND_HNS_HIP06
	tristate "Hisilicon Hip06 Family RoCE support"
	depends on INFINIBAND_HNS && HNS && HNS_DSAF && HNS_ENET
	---help---
	  RoCE driver support for Hisilicon RoCE engine in Hisilicon Hip06 and
	  Hip07 SoC. These RoCE engines are platform devices.

	  To compile this driver as a module, choose M here: the module
	  will be called hns-roce-hw-v1.
+3 −1
Original line number Original line Diff line number Diff line
@@ -5,4 +5,6 @@
obj-$(CONFIG_INFINIBAND_HNS) += hns-roce.o
obj-$(CONFIG_INFINIBAND_HNS) += hns-roce.o
hns-roce-objs := hns_roce_main.o hns_roce_cmd.o hns_roce_eq.o hns_roce_pd.o \
hns-roce-objs := hns_roce_main.o hns_roce_cmd.o hns_roce_eq.o hns_roce_pd.o \
	hns_roce_ah.o hns_roce_hem.o hns_roce_mr.o hns_roce_qp.o \
	hns_roce_ah.o hns_roce_hem.o hns_roce_mr.o hns_roce_qp.o \
	hns_roce_cq.o hns_roce_alloc.o hns_roce_hw_v1.o
	hns_roce_cq.o hns_roce_alloc.o
obj-$(CONFIG_INFINIBAND_HNS_HIP06) += hns-roce-hw-v1.o
hns-roce-hw-v1-objs := hns_roce_hw_v1.o
+2 −0
Original line number Original line Diff line number Diff line
@@ -67,6 +67,7 @@ void hns_roce_bitmap_free(struct hns_roce_bitmap *bitmap, unsigned long obj,
{
{
	hns_roce_bitmap_free_range(bitmap, obj, 1, rr);
	hns_roce_bitmap_free_range(bitmap, obj, 1, rr);
}
}
EXPORT_SYMBOL_GPL(hns_roce_bitmap_free);


int hns_roce_bitmap_alloc_range(struct hns_roce_bitmap *bitmap, int cnt,
int hns_roce_bitmap_alloc_range(struct hns_roce_bitmap *bitmap, int cnt,
				int align, unsigned long *obj)
				int align, unsigned long *obj)
@@ -177,6 +178,7 @@ void hns_roce_buf_free(struct hns_roce_dev *hr_dev, u32 size,
		kfree(buf->page_list);
		kfree(buf->page_list);
	}
	}
}
}
EXPORT_SYMBOL_GPL(hns_roce_buf_free);


int hns_roce_buf_alloc(struct hns_roce_dev *hr_dev, u32 size, u32 max_direct,
int hns_roce_buf_alloc(struct hns_roce_dev *hr_dev, u32 size, u32 max_direct,
		       struct hns_roce_buf *buf)
		       struct hns_roce_buf *buf)
+3 −0
Original line number Original line Diff line number Diff line
@@ -269,6 +269,7 @@ int hns_roce_cmd_mbox(struct hns_roce_dev *hr_dev, u64 in_param, u64 out_param,
					      in_modifier, op_modifier, op,
					      in_modifier, op_modifier, op,
					      timeout);
					      timeout);
}
}
EXPORT_SYMBOL_GPL(hns_roce_cmd_mbox);


int hns_roce_cmd_init(struct hns_roce_dev *hr_dev)
int hns_roce_cmd_init(struct hns_roce_dev *hr_dev)
{
{
@@ -356,6 +357,7 @@ struct hns_roce_cmd_mailbox


	return mailbox;
	return mailbox;
}
}
EXPORT_SYMBOL_GPL(hns_roce_alloc_cmd_mailbox);


void hns_roce_free_cmd_mailbox(struct hns_roce_dev *hr_dev,
void hns_roce_free_cmd_mailbox(struct hns_roce_dev *hr_dev,
			       struct hns_roce_cmd_mailbox *mailbox)
			       struct hns_roce_cmd_mailbox *mailbox)
@@ -366,3 +368,4 @@ void hns_roce_free_cmd_mailbox(struct hns_roce_dev *hr_dev,
	dma_pool_free(hr_dev->cmd.pool, mailbox->buf, mailbox->dma);
	dma_pool_free(hr_dev->cmd.pool, mailbox->buf, mailbox->dma);
	kfree(mailbox);
	kfree(mailbox);
}
}
EXPORT_SYMBOL_GPL(hns_roce_free_cmd_mailbox);
+3 −0
Original line number Original line Diff line number Diff line
@@ -205,6 +205,7 @@ void hns_roce_free_cq(struct hns_roce_dev *hr_dev, struct hns_roce_cq *hr_cq)
	hns_roce_table_put(hr_dev, &cq_table->table, hr_cq->cqn);
	hns_roce_table_put(hr_dev, &cq_table->table, hr_cq->cqn);
	hns_roce_bitmap_free(&cq_table->bitmap, hr_cq->cqn, BITMAP_NO_RR);
	hns_roce_bitmap_free(&cq_table->bitmap, hr_cq->cqn, BITMAP_NO_RR);
}
}
EXPORT_SYMBOL_GPL(hns_roce_free_cq);


static int hns_roce_ib_get_cq_umem(struct hns_roce_dev *hr_dev,
static int hns_roce_ib_get_cq_umem(struct hns_roce_dev *hr_dev,
				   struct ib_ucontext *context,
				   struct ib_ucontext *context,
@@ -385,6 +386,7 @@ struct ib_cq *hns_roce_ib_create_cq(struct ib_device *ib_dev,
	kfree(hr_cq);
	kfree(hr_cq);
	return ERR_PTR(ret);
	return ERR_PTR(ret);
}
}
EXPORT_SYMBOL_GPL(hns_roce_ib_create_cq);


int hns_roce_ib_destroy_cq(struct ib_cq *ib_cq)
int hns_roce_ib_destroy_cq(struct ib_cq *ib_cq)
{
{
@@ -410,6 +412,7 @@ int hns_roce_ib_destroy_cq(struct ib_cq *ib_cq)


	return ret;
	return ret;
}
}
EXPORT_SYMBOL_GPL(hns_roce_ib_destroy_cq);


void hns_roce_cq_completion(struct hns_roce_dev *hr_dev, u32 cqn)
void hns_roce_cq_completion(struct hns_roce_dev *hr_dev, u32 cqn)
{
{
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