Loading bindings/gpu/adreno-pwrlevels.txt +7 −7 Original line number Diff line number Diff line Loading @@ -44,11 +44,11 @@ Optional Properties: bus level for the power level. X will be the return value from of_fdt_get_ddrtype(). - qcom,dvm-val: Value that is used as a register setting for the ACD power feature. It helps determine the threshold for when ACD activates. 0xFFFFFFFF is the default value, and the setting where ACD will never activate. - qcom,acd-level: Value that is used as a register setting for the ACD power feature. It helps to determine the threshold for when ACD activates. Zero is the default value, and the setting where ACD will never activate. Example: qcom,gpu-pwrlevel@6 { Loading @@ -57,7 +57,7 @@ qcom,gpu-pwrlevel@6 { qcom,bus-freq = <0>; qcom,bus-min = <0>; qcom,bus-max = <0>; qcom,dvm-val = <0xffffffff>; qcom,acd-level = <0xffffffff>; }; Example for DDR4/DDR5 specific part: Loading @@ -76,5 +76,5 @@ qcom,gpu-pwrlevel@6 { qcom,bus-min-ddr7 = <7>; qcom,bus-max-ddr7 = <9>; qcom,dvm-val = <0xffffffff>; qcom,acd-level = <0xffffffff>; }; qcom/lito-gpu.dtsi +11 −15 Original line number Diff line number Diff line Loading @@ -202,6 +202,7 @@ qcom,bus-freq = <10>; qcom,bus-min = <9>; qcom,bus-max = <12>; qcom,acd-level = <0x802F5FFD>; }; /* SVS L1 */ Loading @@ -211,6 +212,7 @@ qcom,bus-freq = <8>; qcom,bus-min = <7>; qcom,bus-max = <10>; qcom,acd-level = <0x802F5FFD>; }; /* SVS */ Loading @@ -220,6 +222,7 @@ qcom,bus-freq = <7>; qcom,bus-min = <5>; qcom,bus-max = <8>; qcom,acd-level = <0x802F5FFD>; }; /* Low SVS */ Loading @@ -229,6 +232,7 @@ qcom,bus-freq = <5>; qcom,bus-min = <5>; qcom,bus-max = <7>; qcom,acd-level = <0x802F5FFD>; }; qcom,gpu-pwrlevel@4 { Loading Loading @@ -256,6 +260,7 @@ qcom,bus-freq = <10>; qcom,bus-min = <9>; qcom,bus-max = <12>; qcom,acd-level = <0x802F5FFD>; }; /* SVS L1 */ Loading @@ -265,6 +270,7 @@ qcom,bus-freq = <8>; qcom,bus-min = <7>; qcom,bus-max = <10>; qcom,acd-level = <0x802F5FFD>; }; /* SVS */ Loading @@ -274,6 +280,7 @@ qcom,bus-freq = <7>; qcom,bus-min = <5>; qcom,bus-max = <8>; qcom,acd-level = <0x802F5FFD>; }; /* Low SVS */ Loading @@ -283,6 +290,7 @@ qcom,bus-freq = <5>; qcom,bus-min = <5>; qcom,bus-max = <7>; qcom,acd-level = <0x802F5FFD>; }; qcom,gpu-pwrlevel@4 { Loading @@ -309,6 +317,7 @@ qcom,bus-freq = <8>; qcom,bus-min = <7>; qcom,bus-max = <12>; qcom,acd-level = <0x802F5FFD>; }; /* SVS */ Loading @@ -318,6 +327,7 @@ qcom,bus-freq = <7>; qcom,bus-min = <5>; qcom,bus-max = <8>; qcom,acd-level = <0x802F5FFD>; }; /* Low SVS */ Loading @@ -327,6 +337,7 @@ qcom,bus-freq = <5>; qcom,bus-min = <5>; qcom,bus-max = <7>; qcom,acd-level = <0x802F5FFD>; }; qcom,gpu-pwrlevel@3 { Loading Loading @@ -416,21 +427,6 @@ mboxes = <&qmp_aop 0>; mbox-names = "aop"; qcom,gpu-acd-table { /* Corresponds to levels in the GPU perf table */ qcom,acd-enable-by-level = <0x7e>; qcom,acd-stride = <0x1>; qcom,acd-num-levels = <0x6>; /* ACDCR */ qcom,acd-data = <0x802F5FFD /* LowSVS*/ 0x802F5FFD /* SVS */ 0x802F5FFD /* SVS_L1 */ 0x802F5FFD /* NOM */ 0x802F5FFD /* NOM_L1 */ 0x802F5FFD>; /* TURBO */ }; gmu_user: gmu_user { compatible = "qcom,smmu-gmu-user-cb"; iommus = <&kgsl_smmu 0x4 0x400>; Loading Loading
bindings/gpu/adreno-pwrlevels.txt +7 −7 Original line number Diff line number Diff line Loading @@ -44,11 +44,11 @@ Optional Properties: bus level for the power level. X will be the return value from of_fdt_get_ddrtype(). - qcom,dvm-val: Value that is used as a register setting for the ACD power feature. It helps determine the threshold for when ACD activates. 0xFFFFFFFF is the default value, and the setting where ACD will never activate. - qcom,acd-level: Value that is used as a register setting for the ACD power feature. It helps to determine the threshold for when ACD activates. Zero is the default value, and the setting where ACD will never activate. Example: qcom,gpu-pwrlevel@6 { Loading @@ -57,7 +57,7 @@ qcom,gpu-pwrlevel@6 { qcom,bus-freq = <0>; qcom,bus-min = <0>; qcom,bus-max = <0>; qcom,dvm-val = <0xffffffff>; qcom,acd-level = <0xffffffff>; }; Example for DDR4/DDR5 specific part: Loading @@ -76,5 +76,5 @@ qcom,gpu-pwrlevel@6 { qcom,bus-min-ddr7 = <7>; qcom,bus-max-ddr7 = <9>; qcom,dvm-val = <0xffffffff>; qcom,acd-level = <0xffffffff>; };
qcom/lito-gpu.dtsi +11 −15 Original line number Diff line number Diff line Loading @@ -202,6 +202,7 @@ qcom,bus-freq = <10>; qcom,bus-min = <9>; qcom,bus-max = <12>; qcom,acd-level = <0x802F5FFD>; }; /* SVS L1 */ Loading @@ -211,6 +212,7 @@ qcom,bus-freq = <8>; qcom,bus-min = <7>; qcom,bus-max = <10>; qcom,acd-level = <0x802F5FFD>; }; /* SVS */ Loading @@ -220,6 +222,7 @@ qcom,bus-freq = <7>; qcom,bus-min = <5>; qcom,bus-max = <8>; qcom,acd-level = <0x802F5FFD>; }; /* Low SVS */ Loading @@ -229,6 +232,7 @@ qcom,bus-freq = <5>; qcom,bus-min = <5>; qcom,bus-max = <7>; qcom,acd-level = <0x802F5FFD>; }; qcom,gpu-pwrlevel@4 { Loading Loading @@ -256,6 +260,7 @@ qcom,bus-freq = <10>; qcom,bus-min = <9>; qcom,bus-max = <12>; qcom,acd-level = <0x802F5FFD>; }; /* SVS L1 */ Loading @@ -265,6 +270,7 @@ qcom,bus-freq = <8>; qcom,bus-min = <7>; qcom,bus-max = <10>; qcom,acd-level = <0x802F5FFD>; }; /* SVS */ Loading @@ -274,6 +280,7 @@ qcom,bus-freq = <7>; qcom,bus-min = <5>; qcom,bus-max = <8>; qcom,acd-level = <0x802F5FFD>; }; /* Low SVS */ Loading @@ -283,6 +290,7 @@ qcom,bus-freq = <5>; qcom,bus-min = <5>; qcom,bus-max = <7>; qcom,acd-level = <0x802F5FFD>; }; qcom,gpu-pwrlevel@4 { Loading @@ -309,6 +317,7 @@ qcom,bus-freq = <8>; qcom,bus-min = <7>; qcom,bus-max = <12>; qcom,acd-level = <0x802F5FFD>; }; /* SVS */ Loading @@ -318,6 +327,7 @@ qcom,bus-freq = <7>; qcom,bus-min = <5>; qcom,bus-max = <8>; qcom,acd-level = <0x802F5FFD>; }; /* Low SVS */ Loading @@ -327,6 +337,7 @@ qcom,bus-freq = <5>; qcom,bus-min = <5>; qcom,bus-max = <7>; qcom,acd-level = <0x802F5FFD>; }; qcom,gpu-pwrlevel@3 { Loading Loading @@ -416,21 +427,6 @@ mboxes = <&qmp_aop 0>; mbox-names = "aop"; qcom,gpu-acd-table { /* Corresponds to levels in the GPU perf table */ qcom,acd-enable-by-level = <0x7e>; qcom,acd-stride = <0x1>; qcom,acd-num-levels = <0x6>; /* ACDCR */ qcom,acd-data = <0x802F5FFD /* LowSVS*/ 0x802F5FFD /* SVS */ 0x802F5FFD /* SVS_L1 */ 0x802F5FFD /* NOM */ 0x802F5FFD /* NOM_L1 */ 0x802F5FFD>; /* TURBO */ }; gmu_user: gmu_user { compatible = "qcom,smmu-gmu-user-cb"; iommus = <&kgsl_smmu 0x4 0x400>; Loading