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Commit 078af1a3 authored by Christian König's avatar Christian König Committed by Alex Deucher
Browse files

drm/amdgpu: use amdgpu_bo_free_kernel more often 



Saves us even more loc.

Signed-off-by: default avatarChristian König <christian.koenig@amd.com>
Reviewed-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent a4a02777

drivers/gpu/drm/amd/amdgpu/amdgpu_device.c

+1 −12
Original line number Diff line number Diff line
@@ -345,18 +345,7 @@ static int amdgpu_vram_scratch_init(struct amdgpu_device *adev) 


static void amdgpu_vram_scratch_fini(struct amdgpu_device *adev)

{

	int r;



	if (adev->vram_scratch.robj == NULL) {

		return;

	}

	r = amdgpu_bo_reserve(adev->vram_scratch.robj, true);

	if (likely(r == 0)) {

		amdgpu_bo_kunmap(adev->vram_scratch.robj);

		amdgpu_bo_unpin(adev->vram_scratch.robj);

		amdgpu_bo_unreserve(adev->vram_scratch.robj);

	}

	amdgpu_bo_unref(&adev->vram_scratch.robj);

	amdgpu_bo_free_kernel(&adev->vram_scratch.robj, NULL, NULL);

}



/**

drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c

+3 −34
Original line number Diff line number Diff line
@@ -2217,40 +2217,9 @@ static void gfx_v6_0_ring_emit_vm_flush(struct amdgpu_ring *ring, 


static void gfx_v6_0_rlc_fini(struct amdgpu_device *adev)

{

	int r;



	if (adev->gfx.rlc.save_restore_obj) {

		r = amdgpu_bo_reserve(adev->gfx.rlc.save_restore_obj, true);

		if (unlikely(r != 0))

			dev_warn(adev->dev, "(%d) reserve RLC sr bo failed\n", r);

		amdgpu_bo_unpin(adev->gfx.rlc.save_restore_obj);

		amdgpu_bo_unreserve(adev->gfx.rlc.save_restore_obj);



		amdgpu_bo_unref(&adev->gfx.rlc.save_restore_obj);

		adev->gfx.rlc.save_restore_obj = NULL;

	}



	if (adev->gfx.rlc.clear_state_obj) {

		r = amdgpu_bo_reserve(adev->gfx.rlc.clear_state_obj, true);

		if (unlikely(r != 0))

			dev_warn(adev->dev, "(%d) reserve RLC c bo failed\n", r);

		amdgpu_bo_unpin(adev->gfx.rlc.clear_state_obj);

		amdgpu_bo_unreserve(adev->gfx.rlc.clear_state_obj);



		amdgpu_bo_unref(&adev->gfx.rlc.clear_state_obj);

		adev->gfx.rlc.clear_state_obj = NULL;

	}



	if (adev->gfx.rlc.cp_table_obj) {

		r = amdgpu_bo_reserve(adev->gfx.rlc.cp_table_obj, true);

		if (unlikely(r != 0))

			dev_warn(adev->dev, "(%d) reserve RLC cp table bo failed\n", r);

		amdgpu_bo_unpin(adev->gfx.rlc.cp_table_obj);

		amdgpu_bo_unreserve(adev->gfx.rlc.cp_table_obj);



		amdgpu_bo_unref(&adev->gfx.rlc.cp_table_obj);

		adev->gfx.rlc.cp_table_obj = NULL;

	}

	amdgpu_bo_free_kernel(&adev->gfx.rlc.save_restore_obj, NULL, NULL);

	amdgpu_bo_free_kernel(&adev->gfx.rlc.clear_state_obj, NULL, NULL);

	amdgpu_bo_free_kernel(&adev->gfx.rlc.cp_table_obj, NULL, NULL);

}



static int gfx_v6_0_rlc_init(struct amdgpu_device *adev)

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

+6 −61
Original line number Diff line number Diff line
@@ -2774,39 +2774,18 @@ static int gfx_v7_0_cp_compute_load_microcode(struct amdgpu_device *adev) 
 */

static void gfx_v7_0_cp_compute_fini(struct amdgpu_device *adev)

{

	int i, r;

	int i;



	for (i = 0; i < adev->gfx.num_compute_rings; i++) {

		struct amdgpu_ring *ring = &adev->gfx.compute_ring[i];



		if (ring->mqd_obj) {

			r = amdgpu_bo_reserve(ring->mqd_obj, true);

			if (unlikely(r != 0))

				dev_warn(adev->dev, "(%d) reserve MQD bo failed\n", r);



			amdgpu_bo_unpin(ring->mqd_obj);

			amdgpu_bo_unreserve(ring->mqd_obj);



			amdgpu_bo_unref(&ring->mqd_obj);

			ring->mqd_obj = NULL;

		}

		amdgpu_bo_free_kernel(&ring->mqd_obj, NULL, NULL);

	}

}



static void gfx_v7_0_mec_fini(struct amdgpu_device *adev)

{

	int r;



	if (adev->gfx.mec.hpd_eop_obj) {

		r = amdgpu_bo_reserve(adev->gfx.mec.hpd_eop_obj, true);

		if (unlikely(r != 0))

			dev_warn(adev->dev, "(%d) reserve HPD EOP bo failed\n", r);

		amdgpu_bo_unpin(adev->gfx.mec.hpd_eop_obj);

		amdgpu_bo_unreserve(adev->gfx.mec.hpd_eop_obj);



		amdgpu_bo_unref(&adev->gfx.mec.hpd_eop_obj);

		adev->gfx.mec.hpd_eop_obj = NULL;

	}

	amdgpu_bo_free_kernel(&adev->gfx.mec.hpd_eop_obj, NULL, NULL);

}



static int gfx_v7_0_mec_init(struct amdgpu_device *adev)
@@ -3320,43 +3299,9 @@ static void gfx_v7_0_ring_emit_vm_flush(struct amdgpu_ring *ring, 
 */

static void gfx_v7_0_rlc_fini(struct amdgpu_device *adev)

{

	int r;



	/* save restore block */

	if (adev->gfx.rlc.save_restore_obj) {

		r = amdgpu_bo_reserve(adev->gfx.rlc.save_restore_obj, true);

		if (unlikely(r != 0))

			dev_warn(adev->dev, "(%d) reserve RLC sr bo failed\n", r);

		amdgpu_bo_unpin(adev->gfx.rlc.save_restore_obj);

		amdgpu_bo_unreserve(adev->gfx.rlc.save_restore_obj);



		amdgpu_bo_unref(&adev->gfx.rlc.save_restore_obj);

		adev->gfx.rlc.save_restore_obj = NULL;

	}



	/* clear state block */

	if (adev->gfx.rlc.clear_state_obj) {

		r = amdgpu_bo_reserve(adev->gfx.rlc.clear_state_obj, true);

		if (unlikely(r != 0))

			dev_warn(adev->dev, "(%d) reserve RLC c bo failed\n", r);

		amdgpu_bo_unpin(adev->gfx.rlc.clear_state_obj);

		amdgpu_bo_unreserve(adev->gfx.rlc.clear_state_obj);



		amdgpu_bo_unref(&adev->gfx.rlc.clear_state_obj);

		adev->gfx.rlc.clear_state_obj = NULL;

	}



	/* clear state block */

	if (adev->gfx.rlc.cp_table_obj) {

		r = amdgpu_bo_reserve(adev->gfx.rlc.cp_table_obj, true);

		if (unlikely(r != 0))

			dev_warn(adev->dev, "(%d) reserve RLC cp table bo failed\n", r);

		amdgpu_bo_unpin(adev->gfx.rlc.cp_table_obj);

		amdgpu_bo_unreserve(adev->gfx.rlc.cp_table_obj);



		amdgpu_bo_unref(&adev->gfx.rlc.cp_table_obj);

		adev->gfx.rlc.cp_table_obj = NULL;

	}

	amdgpu_bo_free_kernel(&adev->gfx.rlc.save_restore_obj, NULL, NULL);

	amdgpu_bo_free_kernel(&adev->gfx.rlc.clear_state_obj, NULL, NULL);

	amdgpu_bo_free_kernel(&adev->gfx.rlc.cp_table_obj, NULL, NULL);

}



static int gfx_v7_0_rlc_init(struct amdgpu_device *adev)

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

+3 −34
Original line number Diff line number Diff line
@@ -1238,29 +1238,8 @@ static void cz_init_cp_jump_table(struct amdgpu_device *adev) 


static void gfx_v8_0_rlc_fini(struct amdgpu_device *adev)

{

	int r;



	/* clear state block */

	if (adev->gfx.rlc.clear_state_obj) {

		r = amdgpu_bo_reserve(adev->gfx.rlc.clear_state_obj, true);

		if (unlikely(r != 0))

			dev_warn(adev->dev, "(%d) reserve RLC cbs bo failed\n", r);

		amdgpu_bo_unpin(adev->gfx.rlc.clear_state_obj);

		amdgpu_bo_unreserve(adev->gfx.rlc.clear_state_obj);

		amdgpu_bo_unref(&adev->gfx.rlc.clear_state_obj);

		adev->gfx.rlc.clear_state_obj = NULL;

	}



	/* jump table block */

	if (adev->gfx.rlc.cp_table_obj) {

		r = amdgpu_bo_reserve(adev->gfx.rlc.cp_table_obj, true);

		if (unlikely(r != 0))

			dev_warn(adev->dev, "(%d) reserve RLC cp table bo failed\n", r);

		amdgpu_bo_unpin(adev->gfx.rlc.cp_table_obj);

		amdgpu_bo_unreserve(adev->gfx.rlc.cp_table_obj);

		amdgpu_bo_unref(&adev->gfx.rlc.cp_table_obj);

		adev->gfx.rlc.cp_table_obj = NULL;

	}

	amdgpu_bo_free_kernel(&adev->gfx.rlc.clear_state_obj, NULL, NULL);

	amdgpu_bo_free_kernel(&adev->gfx.rlc.cp_table_obj, NULL, NULL);

}



static int gfx_v8_0_rlc_init(struct amdgpu_device *adev)
@@ -1320,17 +1299,7 @@ static int gfx_v8_0_rlc_init(struct amdgpu_device *adev) 


static void gfx_v8_0_mec_fini(struct amdgpu_device *adev)

{

	int r;



	if (adev->gfx.mec.hpd_eop_obj) {

		r = amdgpu_bo_reserve(adev->gfx.mec.hpd_eop_obj, true);

		if (unlikely(r != 0))

			dev_warn(adev->dev, "(%d) reserve HPD EOP bo failed\n", r);

		amdgpu_bo_unpin(adev->gfx.mec.hpd_eop_obj);

		amdgpu_bo_unreserve(adev->gfx.mec.hpd_eop_obj);

		amdgpu_bo_unref(&adev->gfx.mec.hpd_eop_obj);

		adev->gfx.mec.hpd_eop_obj = NULL;

	}

	amdgpu_bo_free_kernel(&adev->gfx.mec.hpd_eop_obj, NULL, NULL);

}



static int gfx_v8_0_mec_init(struct amdgpu_device *adev)

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

+2 −22
Original line number Diff line number Diff line
@@ -819,28 +819,8 @@ static int gfx_v9_0_rlc_init(struct amdgpu_device *adev) 


static void gfx_v9_0_mec_fini(struct amdgpu_device *adev)

{

	int r;



	if (adev->gfx.mec.hpd_eop_obj) {

		r = amdgpu_bo_reserve(adev->gfx.mec.hpd_eop_obj, true);

		if (unlikely(r != 0))

			dev_warn(adev->dev, "(%d) reserve HPD EOP bo failed\n", r);

		amdgpu_bo_unpin(adev->gfx.mec.hpd_eop_obj);

		amdgpu_bo_unreserve(adev->gfx.mec.hpd_eop_obj);



		amdgpu_bo_unref(&adev->gfx.mec.hpd_eop_obj);

		adev->gfx.mec.hpd_eop_obj = NULL;

	}

	if (adev->gfx.mec.mec_fw_obj) {

		r = amdgpu_bo_reserve(adev->gfx.mec.mec_fw_obj, true);

		if (unlikely(r != 0))

			dev_warn(adev->dev, "(%d) reserve mec firmware bo failed\n", r);

		amdgpu_bo_unpin(adev->gfx.mec.mec_fw_obj);

		amdgpu_bo_unreserve(adev->gfx.mec.mec_fw_obj);



		amdgpu_bo_unref(&adev->gfx.mec.mec_fw_obj);

		adev->gfx.mec.mec_fw_obj = NULL;

	}

	amdgpu_bo_free_kernel(&adev->gfx.mec.hpd_eop_obj, NULL, NULL);

	amdgpu_bo_free_kernel(&adev->gfx.mec.mec_fw_obj, NULL, NULL);

}



static int gfx_v9_0_mec_init(struct amdgpu_device *adev)