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Commit 07167d8a authored by Olof Johansson's avatar Olof Johansson
Browse files

Merge tag 'mvebu-arm-4.19-1' of git://git.infradead.org/linux-mvebu into next/soc 

mvebu arm for 4.19 (part 1)

 - remove potential call from invalid context in boot_secondary
 - allow using CONFIG_FORTIFY_SOURCE in pmsu.c

* tag 'mvebu-arm-4.19-1' of git://git.infradead.org/linux-mvebu

:
  ARM: mvebu: convert secondary CPU clock sync to hotplug state
  ARM: mvebu: declare asm symbols as character arrays in pmsu.c

Signed-off-by: default avatarOlof Johansson <olof@lixom.net>
parents 380d6859 77bc8c28

arch/arm/mach-mvebu/platsmp.c

+23 −26
Original line number Diff line number Diff line
@@ -35,6 +35,8 @@ 
#define AXP_BOOTROM_BASE 0xfff00000

#define AXP_BOOTROM_SIZE 0x100000



static struct clk *boot_cpu_clk;



static struct clk *get_cpu_clk(int cpu)

{

	struct clk *cpu_clk;
@@ -48,30 +50,6 @@ static struct clk *get_cpu_clk(int cpu) 
	return cpu_clk;

}



static void set_secondary_cpu_clock(unsigned int cpu)

{

	int thiscpu;

	unsigned long rate;

	struct clk *cpu_clk;



	thiscpu = get_cpu();



	cpu_clk = get_cpu_clk(thiscpu);

	if (!cpu_clk)

		goto out;

	clk_prepare_enable(cpu_clk);

	rate = clk_get_rate(cpu_clk);



	cpu_clk = get_cpu_clk(cpu);

	if (!cpu_clk)

		goto out;

	clk_set_rate(cpu_clk, rate);

	clk_prepare_enable(cpu_clk);



out:

	put_cpu();

}



static int armada_xp_boot_secondary(unsigned int cpu, struct task_struct *idle)

{

	int ret, hw_cpu;
@@ -79,7 +57,6 @@ static int armada_xp_boot_secondary(unsigned int cpu, struct task_struct *idle) 
	pr_info("Booting CPU %d\n", cpu);



	hw_cpu = cpu_logical_map(cpu);

	set_secondary_cpu_clock(hw_cpu);

	mvebu_pmsu_set_cpu_boot_addr(hw_cpu, armada_xp_secondary_startup);



	/*
@@ -122,6 +99,19 @@ static void __init armada_xp_smp_init_cpus(void) 
		panic("Invalid number of CPUs in DT\n");

}



static int armada_xp_sync_secondary_clk(unsigned int cpu)

{

	struct clk *cpu_clk = get_cpu_clk(cpu);



	if (!cpu_clk || !boot_cpu_clk)

		return 0;



	clk_prepare_enable(cpu_clk);

	clk_set_rate(cpu_clk, clk_get_rate(boot_cpu_clk));



	return 0;

}



static void __init armada_xp_smp_prepare_cpus(unsigned int max_cpus)

{

	struct device_node *node;
@@ -131,6 +121,14 @@ static void __init armada_xp_smp_prepare_cpus(unsigned int max_cpus) 
	flush_cache_all();

	set_cpu_coherent();



	boot_cpu_clk = get_cpu_clk(smp_processor_id());

	if (boot_cpu_clk) {

		clk_prepare_enable(boot_cpu_clk);

		cpuhp_setup_state_nocalls(CPUHP_AP_ARM_MVEBU_SYNC_CLOCKS,

					  "arm/mvebu/sync_clocks:online",

					  armada_xp_sync_secondary_clk, NULL);

	}



	/*

	 * In order to boot the secondary CPUs we need to ensure

	 * the bootROM is mapped at the correct address.
@@ -223,7 +221,6 @@ static int mv98dx3236_boot_secondary(unsigned int cpu, struct task_struct *idle) 
	int ret, hw_cpu;



	hw_cpu = cpu_logical_map(cpu);

	set_secondary_cpu_clock(hw_cpu);

	mv98dx3236_resume_set_cpu_boot_addr(hw_cpu,

					    armada_xp_secondary_startup);

arch/arm/mach-mvebu/pmsu.c

+3 −3
Original line number Diff line number Diff line
@@ -116,8 +116,8 @@ void mvebu_pmsu_set_cpu_boot_addr(int hw_cpu, void *boot_addr) 
		PMSU_BOOT_ADDR_REDIRECT_OFFSET(hw_cpu));

}



extern unsigned char mvebu_boot_wa_start;

extern unsigned char mvebu_boot_wa_end;

extern unsigned char mvebu_boot_wa_start[];

extern unsigned char mvebu_boot_wa_end[];



/*

 * This function sets up the boot address workaround needed for SMP
@@ -130,7 +130,7 @@ int mvebu_setup_boot_addr_wa(unsigned int crypto_eng_target, 
			     phys_addr_t resume_addr_reg)

{

	void __iomem *sram_virt_base;

	u32 code_len = &mvebu_boot_wa_end - &mvebu_boot_wa_start;

	u32 code_len = mvebu_boot_wa_end - mvebu_boot_wa_start;



	mvebu_mbus_del_window(BOOTROM_BASE, BOOTROM_SIZE);

	mvebu_mbus_add_window_by_id(crypto_eng_target, crypto_eng_attribute,

include/linux/cpuhotplug.h

+1 −0
Original line number Diff line number Diff line
@@ -143,6 +143,7 @@ enum cpuhp_state { 
	CPUHP_AP_SMPBOOT_THREADS,

	CPUHP_AP_X86_VDSO_VMA_ONLINE,

	CPUHP_AP_IRQ_AFFINITY_ONLINE,

	CPUHP_AP_ARM_MVEBU_SYNC_CLOCKS,

	CPUHP_AP_PERF_ONLINE,

	CPUHP_AP_PERF_X86_ONLINE,

	CPUHP_AP_PERF_X86_UNCORE_ONLINE,