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Commit 068d1cce authored by Martin Leung's avatar Martin Leung Committed by Greg Kroah-Hartman
Browse files

drm/amd/display: extending AUX SW Timeout



[ Upstream commit f4bbebf8e7eb4d294b040ab2d2ba71e70e69b930 ]

[Why]
AUX takes longer to reply when using active DP-DVI dongle on some asics
resulting in up to 2000+ us edid read (timeout).

[How]
1. Adjust AUX poll to match spec
2. Extend the SW timeout. This does not affect normal
operation since we exit the loop as soon as AUX acks.

Signed-off-by: default avatarMartin Leung <martin.leung@amd.com>
Reviewed-by: default avatarJun Lei <Jun.Lei@amd.com>
Acked-by: default avatarJoshua Aberback <Joshua.Aberback@amd.com>
Acked-by: default avatarLeo Li <sunpeng.li@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Signed-off-by: default avatarSasha Levin <sashal@kernel.org>
parent 2773e745
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+6 −3
Original line number Diff line number Diff line
@@ -189,6 +189,12 @@ static void submit_channel_request(
				1,
				0);
	}

	REG_UPDATE(AUX_INTERRUPT_CONTROL, AUX_SW_DONE_ACK, 1);

	REG_WAIT(AUX_SW_STATUS, AUX_SW_DONE, 0,
				10, aux110->timeout_period/10);

	/* set the delay and the number of bytes to write */

	/* The length include
@@ -241,9 +247,6 @@ static void submit_channel_request(
		}
	}

	REG_UPDATE(AUX_INTERRUPT_CONTROL, AUX_SW_DONE_ACK, 1);
	REG_WAIT(AUX_SW_STATUS, AUX_SW_DONE, 0,
				10, aux110->timeout_period/10);
	REG_UPDATE(AUX_SW_CONTROL, AUX_SW_GO, 1);
}

+3 −3
Original line number Diff line number Diff line
@@ -69,11 +69,11 @@ enum { /* This is the timeout as defined in DP 1.2a,
	 * at most within ~240usec. That means,
	 * increasing this timeout will not affect normal operation,
	 * and we'll timeout after
	 * SW_AUX_TIMEOUT_PERIOD_MULTIPLIER * AUX_TIMEOUT_PERIOD = 1600usec.
	 * SW_AUX_TIMEOUT_PERIOD_MULTIPLIER * AUX_TIMEOUT_PERIOD = 2400usec.
	 * This timeout is especially important for
	 * resume from S3 and CTS.
	 * converters, resume from S3, and CTS.
	 */
	SW_AUX_TIMEOUT_PERIOD_MULTIPLIER = 4
	SW_AUX_TIMEOUT_PERIOD_MULTIPLIER = 6
};
struct aux_engine_dce110 {
	struct aux_engine base;