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Commit 0623013c authored by Suman Anna's avatar Suman Anna Committed by Santosh Shilimkar
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ARM: dts: keystone-k2e: Add PSC reset controller node 



The Power Sleep Controller (PSC) module contains specific
memory-mapped registers that can be used to perform reset
management using specific bits for the DSPs available on the
SoC. The PSC is defined using a syscon node, and the reset
functionality is defined using a child syscon reset controller
node.

Add this syscon reset controller node as well as the reset
control data for the resets it supports for the 66AK2E SoCs.

Signed-off-by: default avatarAndrew F. Davis <afd@ti.com>
Signed-off-by: default avatarSuman Anna <s-anna@ti.com>
Signed-off-by: default avatarSantosh Shilimkar <ssantosh@kernel.org>
parent 2ae4dad3

arch/arm/boot/dts/keystone-k2e.dtsi

+13 −0
Original line number Diff line number Diff line
@@ -8,6 +8,8 @@ 
 * published by the Free Software Foundation.

 */



#include <dt-bindings/reset/ti-syscon.h>



/ {

	compatible = "ti,k2e", "ti,keystone";

	model = "Texas Instruments Keystone 2 Edison SoC";
@@ -94,6 +96,17 @@ 
			};

		};



		psc: power-sleep-controller@02350000 {

			pscrst: reset-controller {

				compatible = "ti,k2e-pscrst", "ti,syscon-reset";

				#reset-cells = <1>;



				ti,reset-bits = <

					0xa3c 8 0xa3c 8 0x83c 8 (ASSERT_CLEAR | DEASSERT_SET | STATUS_CLEAR) /* 0: dsp0 */

				>;

			};

		};



		dspgpio0: keystone_dsp_gpio@02620240 {

			compatible = "ti,keystone-dsp-gpio";

			gpio-controller;