Loading drivers/gpu/msm/adreno_a6xx.c +30 −5 Original line number Diff line number Diff line // SPDX-License-Identifier: GPL-2.0-only /* * Copyright (c) 2017-2020, The Linux Foundation. All rights reserved. * Copyright (c) 2017-2021, The Linux Foundation. All rights reserved. */ #include <linux/firmware.h> Loading Loading @@ -89,9 +89,27 @@ static u32 a6xx_ifpc_pwrup_reglist[] = { }; /* Applicable to a620 and a650 */ static u32 a650_ifpc_pwrup_reglist[] = { A6XX_CP_PROTECT_REG+32, A6XX_CP_PROTECT_REG+33, A6XX_CP_PROTECT_REG+34, A6XX_CP_PROTECT_REG+35, A6XX_CP_PROTECT_REG+36, A6XX_CP_PROTECT_REG+37, A6XX_CP_PROTECT_REG+38, A6XX_CP_PROTECT_REG+39, A6XX_CP_PROTECT_REG+40, A6XX_CP_PROTECT_REG+41, A6XX_CP_PROTECT_REG+42, A6XX_CP_PROTECT_REG+43, A6XX_CP_PROTECT_REG+44, A6XX_CP_PROTECT_REG+45, A6XX_CP_PROTECT_REG+46, A6XX_CP_PROTECT_REG+47, }; static u32 a650_pwrup_reglist[] = { A6XX_RBBM_GBIF_CLIENT_QOS_CNTL, A6XX_CP_PROTECT_REG + 47, /* Programmed for infinite span */ A6XX_TPL1_BICUBIC_WEIGHTS_TABLE_0, A6XX_TPL1_BICUBIC_WEIGHTS_TABLE_1, A6XX_TPL1_BICUBIC_WEIGHTS_TABLE_2, Loading Loading @@ -351,14 +369,21 @@ struct a6xx_reglist_list { static void a6xx_patch_pwrup_reglist(struct adreno_device *adreno_dev) { struct a6xx_reglist_list reglist[3]; struct a6xx_reglist_list reglist[4]; void *ptr = adreno_dev->pwrup_reglist.hostptr; struct cpu_gpu_lock *lock = ptr; int items = 0, i, j; u32 *dest = ptr + sizeof(*lock); u16 list_offset = 0; /* Static IFPC-only registers */ reglist[items++] = REGLIST(a6xx_ifpc_pwrup_reglist); reglist[items] = REGLIST(a6xx_ifpc_pwrup_reglist); list_offset += reglist[items++].count * 2; if (adreno_is_a650_family(adreno_dev)) { reglist[items] = REGLIST(a650_ifpc_pwrup_reglist); list_offset += reglist[items++].count * 2; } /* Static IFPC + preemption registers */ reglist[items++] = REGLIST(a6xx_pwrup_reglist); Loading Loading @@ -401,7 +426,7 @@ static void a6xx_patch_pwrup_reglist(struct adreno_device *adreno_dev) * all the lists and list_offset should be specified as the size in * dwords of the first entry in the list. */ lock->list_offset = reglist[0].count * 2; lock->list_offset = list_offset; } /* Loading Loading
drivers/gpu/msm/adreno_a6xx.c +30 −5 Original line number Diff line number Diff line // SPDX-License-Identifier: GPL-2.0-only /* * Copyright (c) 2017-2020, The Linux Foundation. All rights reserved. * Copyright (c) 2017-2021, The Linux Foundation. All rights reserved. */ #include <linux/firmware.h> Loading Loading @@ -89,9 +89,27 @@ static u32 a6xx_ifpc_pwrup_reglist[] = { }; /* Applicable to a620 and a650 */ static u32 a650_ifpc_pwrup_reglist[] = { A6XX_CP_PROTECT_REG+32, A6XX_CP_PROTECT_REG+33, A6XX_CP_PROTECT_REG+34, A6XX_CP_PROTECT_REG+35, A6XX_CP_PROTECT_REG+36, A6XX_CP_PROTECT_REG+37, A6XX_CP_PROTECT_REG+38, A6XX_CP_PROTECT_REG+39, A6XX_CP_PROTECT_REG+40, A6XX_CP_PROTECT_REG+41, A6XX_CP_PROTECT_REG+42, A6XX_CP_PROTECT_REG+43, A6XX_CP_PROTECT_REG+44, A6XX_CP_PROTECT_REG+45, A6XX_CP_PROTECT_REG+46, A6XX_CP_PROTECT_REG+47, }; static u32 a650_pwrup_reglist[] = { A6XX_RBBM_GBIF_CLIENT_QOS_CNTL, A6XX_CP_PROTECT_REG + 47, /* Programmed for infinite span */ A6XX_TPL1_BICUBIC_WEIGHTS_TABLE_0, A6XX_TPL1_BICUBIC_WEIGHTS_TABLE_1, A6XX_TPL1_BICUBIC_WEIGHTS_TABLE_2, Loading Loading @@ -351,14 +369,21 @@ struct a6xx_reglist_list { static void a6xx_patch_pwrup_reglist(struct adreno_device *adreno_dev) { struct a6xx_reglist_list reglist[3]; struct a6xx_reglist_list reglist[4]; void *ptr = adreno_dev->pwrup_reglist.hostptr; struct cpu_gpu_lock *lock = ptr; int items = 0, i, j; u32 *dest = ptr + sizeof(*lock); u16 list_offset = 0; /* Static IFPC-only registers */ reglist[items++] = REGLIST(a6xx_ifpc_pwrup_reglist); reglist[items] = REGLIST(a6xx_ifpc_pwrup_reglist); list_offset += reglist[items++].count * 2; if (adreno_is_a650_family(adreno_dev)) { reglist[items] = REGLIST(a650_ifpc_pwrup_reglist); list_offset += reglist[items++].count * 2; } /* Static IFPC + preemption registers */ reglist[items++] = REGLIST(a6xx_pwrup_reglist); Loading Loading @@ -401,7 +426,7 @@ static void a6xx_patch_pwrup_reglist(struct adreno_device *adreno_dev) * all the lists and list_offset should be specified as the size in * dwords of the first entry in the list. */ lock->list_offset = reglist[0].count * 2; lock->list_offset = list_offset; } /* Loading