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Commit 04759194 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'arm64-upstream' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux 

Pull arm64 updates from Catalin Marinas:

 - VMAP_STACK support, allowing the kernel stacks to be allocated in the
   vmalloc space with a guard page for trapping stack overflows. One of
   the patches introduces THREAD_ALIGN and changes the generic
   alloc_thread_stack_node() to use this instead of THREAD_SIZE (no
   functional change for other architectures)

 - Contiguous PTE hugetlb support re-enabled (after being reverted a
   couple of times). We now have the semantics agreed in the generic mm
   layer together with API improvements so that the architecture code
   can detect between contiguous and non-contiguous huge PTEs

 - Initial support for persistent memory on ARM: DC CVAP instruction
   exposed to user space (HWCAP) and the in-kernel pmem API implemented

 - raid6 improvements for arm64: faster algorithm for the delta syndrome
   and implementation of the recovery routines using Neon

 - FP/SIMD refactoring and removal of support for Neon in interrupt
   context. This is in preparation for full SVE support

 - PTE accessors converted from inline asm to cmpxchg so that we can use
   LSE atomics if available (ARMv8.1)

 - Perf support for Cortex-A35 and A73

 - Non-urgent fixes and cleanups

* tag 'arm64-upstream' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux: (75 commits)
  arm64: cleanup {COMPAT_,}SET_PERSONALITY() macro
  arm64: introduce separated bits for mm_context_t flags
  arm64: hugetlb: Cleanup setup_hugepagesz
  arm64: Re-enable support for contiguous hugepages
  arm64: hugetlb: Override set_huge_swap_pte_at() to support contiguous hugepages
  arm64: hugetlb: Override huge_pte_clear() to support contiguous hugepages
  arm64: hugetlb: Handle swap entries in huge_pte_offset() for contiguous hugepages
  arm64: hugetlb: Add break-before-make logic for contiguous entries
  arm64: hugetlb: Spring clean huge pte accessors
  arm64: hugetlb: Introduce pte_pgprot helper
  arm64: hugetlb: set_huge_pte_at Add WARN_ON on !pte_present
  arm64: kexec: have own crash_smp_send_stop() for crash dump for nonpanic cores
  arm64: dma-mapping: Mark atomic_pool as __ro_after_init
  arm64: dma-mapping: Do not pass data to gen_pool_set_algo()
  arm64: Remove the !CONFIG_ARM64_HW_AFDBM alternative code paths
  arm64: Ignore hardware dirty bit updates in ptep_set_wrprotect()
  arm64: Move PTE_RDONLY bit handling out of set_pte_at()
  kvm: arm64: Convert kvm_set_s2pte_readonly() from inline asm to cmpxchg()
  arm64: Convert pte handling from inline asm to using (cmp)xchg
  arm64: neon/efi: Make EFI fpsimd save/restore variables static
  ...
parents 9e85ae6a d1be5c99

Documentation/arm64/cpu-feature-registers.txt

+2 −0
Original line number Diff line number Diff line
@@ -179,6 +179,8 @@ infrastructure: 
     | FCMA                         | [19-16] |    y    |

     |--------------------------------------------------|

     | JSCVT                        | [15-12] |    y    |

     |--------------------------------------------------|

     | DPB                          | [3-0]   |    y    |

     x--------------------------------------------------x



Appendix I: Example

Documentation/devicetree/bindings/arm/pmu.txt

+2 −0
Original line number Diff line number Diff line
@@ -9,9 +9,11 @@ Required properties: 
- compatible : should be one of

	"apm,potenza-pmu"

	"arm,armv8-pmuv3"

	"arm,cortex-a73-pmu"

	"arm,cortex-a72-pmu"

	"arm,cortex-a57-pmu"

	"arm,cortex-a53-pmu"

	"arm,cortex-a35-pmu"

	"arm,cortex-a17-pmu"

	"arm,cortex-a15-pmu"

	"arm,cortex-a12-pmu"

arch/arm64/Kconfig

+13 −0
Original line number Diff line number Diff line
@@ -75,6 +75,7 @@ config ARM64 
	select HAVE_ARCH_SECCOMP_FILTER

	select HAVE_ARCH_TRACEHOOK

	select HAVE_ARCH_TRANSPARENT_HUGEPAGE

	select HAVE_ARCH_VMAP_STACK

	select HAVE_ARM_SMCCC

	select HAVE_EBPF_JIT

	select HAVE_C_RECORDMCOUNT
@@ -960,6 +961,18 @@ config ARM64_UAO 
	  regular load/store instructions if the cpu does not implement the

	  feature.



config ARM64_PMEM

	bool "Enable support for persistent memory"

	select ARCH_HAS_PMEM_API

	select ARCH_HAS_UACCESS_FLUSHCACHE

	help

	  Say Y to enable support for the persistent memory API based on the

	  ARMv8.2 DCPoP feature.



	  The feature is detected at runtime, and the kernel will use DC CVAC

	  operations if DC CVAP is not supported (following the behaviour of

	  DC CVAP itself if the system does not define a point of persistence).



endmenu



config ARM64_MODULE_CMODEL_LARGE

arch/arm64/include/asm/Kbuild

+0 −1
Original line number Diff line number Diff line
@@ -20,7 +20,6 @@ generic-y += rwsem.h 
generic-y += segment.h

generic-y += serial.h

generic-y += set_memory.h

generic-y += simd.h

generic-y += sizes.h

generic-y += switch_to.h

generic-y += trace_clock.h

arch/arm64/include/asm/asm-bug.h

0 → 100644
+54 −0
Original line number Diff line number Diff line 
#ifndef __ASM_ASM_BUG_H

/*

 * Copyright (C) 2017  ARM Limited

 *

 * This program is free software; you can redistribute it and/or modify

 * it under the terms of the GNU General Public License version 2 as

 * published by the Free Software Foundation.

 *

 * This program is distributed in the hope that it will be useful,

 * but WITHOUT ANY WARRANTY; without even the implied warranty of

 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the

 * GNU General Public License for more details.

 *

 * You should have received a copy of the GNU General Public License

 * along with this program.  If not, see <http://www.gnu.org/licenses/>.

 */

#define __ASM_ASM_BUG_H



#include <asm/brk-imm.h>



#ifdef CONFIG_DEBUG_BUGVERBOSE

#define _BUGVERBOSE_LOCATION(file, line) __BUGVERBOSE_LOCATION(file, line)

#define __BUGVERBOSE_LOCATION(file, line)			\

		.pushsection .rodata.str,"aMS",@progbits,1;	\

	2:	.string file;					\

		.popsection;					\

								\

		.long 2b - 0b;					\

		.short line;

#else

#define _BUGVERBOSE_LOCATION(file, line)

#endif



#ifdef CONFIG_GENERIC_BUG



#define __BUG_ENTRY(flags) 				\

		.pushsection __bug_table,"aw";		\

		.align 2;				\

	0:	.long 1f - 0b;				\

_BUGVERBOSE_LOCATION(__FILE__, __LINE__)		\

		.short flags; 				\

		.popsection;				\

	1:

#else

#define __BUG_ENTRY(flags)

#endif



#define ASM_BUG_FLAGS(flags)				\

	__BUG_ENTRY(flags)				\

	brk	BUG_BRK_IMM



#define ASM_BUG()	ASM_BUG_FLAGS(0)



#endif /* __ASM_ASM_BUG_H */