ARM: dts: msm: Enable IPA node for scuba

		};

	};

	qcom,msm_gsi {

		compatible = "qcom,msm_gsi";

	};

	qcom,rmnet-ipa {

		compatible = "qcom,rmnet-ipa3";

		qcom,rmnet-ipa-ssr;

		qcom,ipa-platform-type-msm;

		qcom,ipa-advertise-sg-support;

		qcom,ipa-napi-enable;

	};

	qcom,ipa_fws {

		compatible = "qcom,pil-tz-generic";

		qcom,pas-id = <0xf>;

		qcom,firmware-name = "scuba_ipa_fws";

		qcom,pil-force-shutdown;

		memory-region = <&pil_ipa_fw_mem>;

	};

	ipa_hw: qcom,ipa@0x5800000 {

		compatible = "qcom,ipa";

		reg = <0x5800000 0x34000>,

			<0x5804000 0x28000>;

		reg-names = "ipa-base", "gsi-base";

		interrupts = <0 257 0>, <0 259 0>;

		interrupt-names = "ipa-irq", "gsi-irq";

		qcom,ipa-hw-ver = <16>; /* IPA core version = IPAv4.2 */

		qcom,ipa-hw-mode = <0>;

		qcom,platform-type = <1>; /* MSM platform */

		qcom,ee = <0>;

		qcom,use-ipa-tethering-bridge;

		qcom,modem-cfg-emb-pipe-flt;

		qcom,ipa-wdi2;

		qcom,ipa-wdi2_over_gsi;

		qcom,ipa-endp-delay-wa;

		qcom,use-ipa-pm;

		qcom,arm-smmu;

		qcom,smmu-fast-map;

		qcom,use-64-bit-dma-mask;

		qcom,ipa-fltrt-not-hashable;

		qcom,skip-ieob-mask-wa;

		qcom,msm-bus,name = "ipa";

		qcom,use-gsi-ipa-fw = "scuba_ipa_fws";

		clocks = <&rpmcc RPM_SMD_IPA_CLK>;

		clock-names = "core_clk";

		qcom,msm-bus,num-cases = <5>;

		qcom,msm-bus,num-paths = <3>;

		qcom,msm-bus,vectors-KBps =

		/* No vote */

		<MSM_BUS_MASTER_IPA MSM_BUS_SLAVE_EBI_CH0 0 0>,

		<MSM_BUS_MASTER_IPA MSM_BUS_SLAVE_OCIMEM 0 0>,

		<MSM_BUS_MASTER_AMPSS_M0 MSM_BUS_SLAVE_IPA_CFG 0 0>,

		/* SVS2 */

		<MSM_BUS_MASTER_IPA MSM_BUS_SLAVE_EBI_CH0 80000 465000>,

		<MSM_BUS_MASTER_IPA MSM_BUS_SLAVE_OCIMEM 80000 68570>,

		<MSM_BUS_MASTER_AMPSS_M0 MSM_BUS_SLAVE_IPA_CFG 80000 30>,

		/* SVS */

		<MSM_BUS_MASTER_IPA MSM_BUS_SLAVE_EBI_CH0 80000 2000000>,

		<MSM_BUS_MASTER_IPA MSM_BUS_SLAVE_OCIMEM 80000 267461>,

		<MSM_BUS_MASTER_AMPSS_M0 MSM_BUS_SLAVE_IPA_CFG 80000 109890>,

		/* NOMINAL */

		<MSM_BUS_MASTER_IPA MSM_BUS_SLAVE_EBI_CH0  206000 4000000>,

		<MSM_BUS_MASTER_IPA MSM_BUS_SLAVE_OCIMEM 206000 712961>,

		<MSM_BUS_MASTER_AMPSS_M0 MSM_BUS_SLAVE_IPA_CFG 206000 491520>,

		/* TURBO */

		<MSM_BUS_MASTER_IPA MSM_BUS_SLAVE_EBI_CH0 206000 5598900>,

		<MSM_BUS_MASTER_IPA MSM_BUS_SLAVE_OCIMEM 206000 1436481>,

		<MSM_BUS_MASTER_AMPSS_M0 MSM_BUS_SLAVE_IPA_CFG 206000 491520>;

		qcom,bus-vector-names =

				"MIN", "SVS2", "SVS", "NOMINAL", "TURBO";

		qcom,throughput-threshold = <310 600 1000>;

		qcom,scaling-exceptions = <>;

		/* smp2p information */

		qcom,smp2p_map_ipa_1_out {

			compatible = "qcom,smp2p-map-ipa-1-out";

			qcom,smem-states = <&smp2p_ipa_1_out 0>;

			qcom,smem-state-names = "ipa-smp2p-out";

		};

		qcom,smp2p_map_ipa_1_in {

			compatible = "qcom,smp2p-map-ipa-1-in";

			interrupts-extended = <&smp2p_ipa_1_in 0 0>;

			interrupt-names = "ipa-smp2p-in";

		};

	};

	ipa_smmu_ap: ipa_smmu_ap {

		compatible = "qcom,ipa-smmu-ap-cb";

		iommus = <&apps_smmu 0x0140 0x0>;

		qcom,iommu-dma-addr-pool = <0x10000000 0x30000000>;

		/* modem tables in IMEM */

		qcom,additional-mapping = <0x0c123000 0x0c123000 0x2000>;

		qcom,iommu-dma = "bypass";

	};

	ipa_smmu_wlan: ipa_smmu_wlan {

		compatible = "qcom,ipa-smmu-wlan-cb";

		iommus = <&apps_smmu 0x141 0x0>;

		/* ipa-uc ram */

		qcom,iommu-dma = "bypass";

	};

	ipa_smmu_uc: ipa_smmu_uc {

		compatible = "qcom,ipa-smmu-uc-cb";

		iommus = <&apps_smmu 0x0142 0x0>;

		qcom,iommu-dma-addr-pool = <0x40400000 0x1fc00000>;

		qcom,iommu-dma = "bypass";

	};

};

#include "pm2250.dtsi"