Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 04092204 authored by Paolo Bonzini's avatar Paolo Bonzini
Browse files

Merge tag 'kvm-arm-for-3.16' of...

Merge tag 'kvm-arm-for-3.16' of git://git.kernel.org/pub/scm/linux/kernel/git/kvmarm/kvmarm into kvm-next

Changed for the 3.16 merge window.

This includes KVM support for PSCI v0.2 and also includes generic Linux
support for PSCI v0.2 (on hosts that advertise that feature via their
DT), since the latter depends on headers introduced by the former.

Finally there's a small patch from Marc that enables Cortex-A53 support.
parents 9b88ae99 1252b331
Loading
Loading
Loading
Loading
+36 −1
Original line number Diff line number Diff line
@@ -21,7 +21,15 @@ to #0.

Main node required properties:

 - compatible    : Must be "arm,psci"
 - compatible    : should contain at least one of:

				 * "arm,psci" : for implementations complying to PSCI versions prior to
					0.2. For these cases function IDs must be provided.

				 * "arm,psci-0.2" : for implementations complying to PSCI 0.2. Function
					IDs are not required and should be ignored by an OS with PSCI 0.2
					support, but are permitted to be present for compatibility with
					existing software when "arm,psci" is later in the compatible list.

 - method        : The method of calling the PSCI firmware. Permitted
                   values are:
@@ -45,6 +53,8 @@ Main node optional properties:

Example:

Case 1: PSCI v0.1 only.

	psci {
		compatible	= "arm,psci";
		method		= "smc";
@@ -53,3 +63,28 @@ Example:
		cpu_on		= <0x95c10002>;
		migrate		= <0x95c10003>;
	};


Case 2: PSCI v0.2 only

	psci {
		compatible	= "arm,psci-0.2";
		method		= "smc";
	};

Case 3: PSCI v0.2 and PSCI v0.1.

	A DTB may provide IDs for use by kernels without PSCI 0.2 support,
	enabling firmware and hypervisors to support existing and new kernels.
	These IDs will be ignored by kernels with PSCI 0.2 support, which will
	use the standard PSCI 0.2 IDs exclusively.

	psci {
		compatible = "arm,psci-0.2", "arm,psci";
		method = "hvc";

		cpu_on = < arbitrary value >;
		cpu_off = < arbitrary value >;

		...
	};
+17 −0
Original line number Diff line number Diff line
@@ -2378,6 +2378,8 @@ Possible features:
	  Depends on KVM_CAP_ARM_PSCI.
	- KVM_ARM_VCPU_EL1_32BIT: Starts the CPU in a 32bit mode.
	  Depends on KVM_CAP_ARM_EL1_32BIT (arm64 only).
	- KVM_ARM_VCPU_PSCI_0_2: Emulate PSCI v0.2 for the CPU.
	  Depends on KVM_CAP_ARM_PSCI_0_2.


4.83 KVM_ARM_PREFERRED_TARGET
@@ -2740,6 +2742,21 @@ It gets triggered whenever both KVM_CAP_PPC_EPR are enabled and an
external interrupt has just been delivered into the guest. User space
should put the acknowledged interrupt vector into the 'epr' field.

		/* KVM_EXIT_SYSTEM_EVENT */
		struct {
#define KVM_SYSTEM_EVENT_SHUTDOWN       1
#define KVM_SYSTEM_EVENT_RESET          2
			__u32 type;
			__u64 flags;
		} system_event;

If exit_reason is KVM_EXIT_SYSTEM_EVENT then the vcpu has triggered
a system-level event using some architecture specific mechanism (hypercall
or some special instruction). In case of ARM/ARM64, this is triggered using
HVC instruction based PSCI call from the vcpu. The 'type' field describes
the system-level event type. The 'flags' field describes architecture
specific flags for the system-level event.

		/* Fix the size of the union. */
		char padding[256];
	};
+1 −1
Original line number Diff line number Diff line
@@ -36,7 +36,7 @@
#define KVM_COALESCED_MMIO_PAGE_OFFSET 1
#define KVM_HAVE_ONE_REG

#define KVM_VCPU_MAX_FEATURES 1
#define KVM_VCPU_MAX_FEATURES 2

#include <kvm/arm_vgic.h>

+5 −1
Original line number Diff line number Diff line
@@ -18,6 +18,10 @@
#ifndef __ARM_KVM_PSCI_H__
#define __ARM_KVM_PSCI_H__

bool kvm_psci_call(struct kvm_vcpu *vcpu);
#define KVM_ARM_PSCI_0_1	1
#define KVM_ARM_PSCI_0_2	2

int kvm_psci_version(struct kvm_vcpu *vcpu);
int kvm_psci_call(struct kvm_vcpu *vcpu);

#endif /* __ARM_KVM_PSCI_H__ */
+5 −2
Original line number Diff line number Diff line
@@ -29,16 +29,19 @@ struct psci_operations {
	int (*cpu_off)(struct psci_power_state state);
	int (*cpu_on)(unsigned long cpuid, unsigned long entry_point);
	int (*migrate)(unsigned long cpuid);
	int (*affinity_info)(unsigned long target_affinity,
			unsigned long lowest_affinity_level);
	int (*migrate_info_type)(void);
};

extern struct psci_operations psci_ops;
extern struct smp_operations psci_smp_ops;

#ifdef CONFIG_ARM_PSCI
void psci_init(void);
int psci_init(void);
bool psci_smp_available(void);
#else
static inline void psci_init(void) { }
static inline int psci_init(void) { }
static inline bool psci_smp_available(void) { return false; }
#endif

Loading