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Commit 03be7505 authored May 27, 2008 by Maciej W. Rozycki Committed by Ingo Molnar Jul 08, 2008

x86: I/O APIC: keep the timer IRQ masked during set-up



Keep the timer interrupt line masked when reconfiguring its interrupt
redirection entry in the I/O APIC.

Signed-off-by: Maciej W. Rozycki <macro@linux-mips.org>
Signed-off-by: Ingo Molnar <mingo@elte.hu>

parent 24742ece

arch/x86/kernel/io_apic_32.c

+1 −1

Original line number	Diff line number	Diff line
		@@ -1316,7 +1316,7 @@ static void __init setup_timer_IRQ0_pin(unsigned int apic, unsigned int pin,
		* to the first CPU.
		*/
		entry.dest_mode = INT_DEST_MODE;
		entry.mask = 0; /* unmask IRQ now */
		entry.mask = 1; /* mask IRQ now */
		entry.dest.logical.logical_dest = cpu_mask_to_apicid(TARGET_CPUS);
		entry.delivery_mode = INT_DELIVERY_MODE;
		entry.polarity = 0;

arch/x86/kernel/io_apic_64.c

+1 −1

Original line number	Diff line number	Diff line
		@@ -911,7 +911,7 @@ static void __init setup_timer_IRQ0_pin(unsigned int apic, unsigned int pin,
		* to the first CPU.
		*/
		entry.dest_mode = INT_DEST_MODE;
		entry.mask = 0; /* unmask IRQ now */
		entry.mask = 1; /* mask IRQ now */
		entry.dest = cpu_mask_to_apicid(TARGET_CPUS);
		entry.delivery_mode = INT_DELIVERY_MODE;
		entry.polarity = 0;