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Commit 0296b5d9 authored by Alexandre Courbot's avatar Alexandre Courbot Committed by Ben Skeggs
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drm/nouveau/gr/gf100: split gf100_gr_init_ctxctl()



gf100_gr_init_ctxctl() is basically two different functions (one for
use of internal firmware, the other for use of external firmware), but
its current layout makes it look more complex than it is. Split it to
better reflect that fact.

Signed-off-by: default avatarAlexandre Courbot <acourbot@nvidia.com>
Signed-off-by: default avatarBen Skeggs <bskeggs@redhat.com>
parent d2753f40
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+115 −97
Original line number Original line Diff line number Diff line
@@ -1455,17 +1455,15 @@ gf100_gr_init_csdata(struct gf100_gr *gr,
	nvkm_wr32(device, falcon + 0x01c4, star + 4);
	nvkm_wr32(device, falcon + 0x01c4, star + 4);
}
}


int
/* Initialize context from an external (secure or not) firmware */
gf100_gr_init_ctxctl(struct gf100_gr *gr)
static int
gf100_gr_init_ctxctl_ext(struct gf100_gr *gr)
{
{
	const struct gf100_grctx_func *grctx = gr->func->grctx;
	struct nvkm_subdev *subdev = &gr->base.engine.subdev;
	struct nvkm_subdev *subdev = &gr->base.engine.subdev;
	struct nvkm_device *device = subdev->device;
	struct nvkm_device *device = subdev->device;
	struct nvkm_secboot *sb = device->secboot;
	struct nvkm_secboot *sb = device->secboot;
	int i;
	int ret = 0;
	int ret = 0;


	if (gr->firmware) {
	/* load fuc microcode */
	/* load fuc microcode */
	nvkm_mc_unk260(device, 0);
	nvkm_mc_unk260(device, 0);


@@ -1473,16 +1471,14 @@ gf100_gr_init_ctxctl(struct gf100_gr *gr)
	if (nvkm_secboot_is_managed(sb, NVKM_SECBOOT_FALCON_FECS))
	if (nvkm_secboot_is_managed(sb, NVKM_SECBOOT_FALCON_FECS))
		ret = nvkm_secboot_reset(sb, NVKM_SECBOOT_FALCON_FECS);
		ret = nvkm_secboot_reset(sb, NVKM_SECBOOT_FALCON_FECS);
	else
	else
			gf100_gr_init_fw(gr, 0x409000, &gr->fuc409c,
		gf100_gr_init_fw(gr, 0x409000, &gr->fuc409c, &gr->fuc409d);
					 &gr->fuc409d);
	if (ret)
	if (ret)
		return ret;
		return ret;


	if (nvkm_secboot_is_managed(sb, NVKM_SECBOOT_FALCON_GPCCS))
	if (nvkm_secboot_is_managed(sb, NVKM_SECBOOT_FALCON_GPCCS))
		ret = nvkm_secboot_reset(sb, NVKM_SECBOOT_FALCON_GPCCS);
		ret = nvkm_secboot_reset(sb, NVKM_SECBOOT_FALCON_GPCCS);
	else
	else
			gf100_gr_init_fw(gr, 0x41a000, &gr->fuc41ac,
		gf100_gr_init_fw(gr, 0x41a000, &gr->fuc41ac, &gr->fuc41ad);
					 &gr->fuc41ad);
	if (ret)
	if (ret)
		return ret;
		return ret;


@@ -1582,7 +1578,16 @@ gf100_gr_init_ctxctl(struct gf100_gr *gr)
	}
	}


	return 0;
	return 0;
	} else
}

static int
gf100_gr_init_ctxctl_int(struct gf100_gr *gr)
{
	const struct gf100_grctx_func *grctx = gr->func->grctx;
	struct nvkm_subdev *subdev = &gr->base.engine.subdev;
	struct nvkm_device *device = subdev->device;
	int i;

	if (!gr->func->fecs.ucode) {
	if (!gr->func->fecs.ucode) {
		return -ENOSYS;
		return -ENOSYS;
	}
	}
@@ -1642,6 +1647,19 @@ gf100_gr_init_ctxctl(struct gf100_gr *gr)
	return 0;
	return 0;
}
}


int
gf100_gr_init_ctxctl(struct gf100_gr *gr)
{
	int ret;

	if (gr->firmware)
		ret = gf100_gr_init_ctxctl_ext(gr);
	else
		ret = gf100_gr_init_ctxctl_int(gr);

	return ret;
}

static int
static int
gf100_gr_oneinit(struct nvkm_gr *base)
gf100_gr_oneinit(struct nvkm_gr *base)
{
{