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Commit 021c62c4 authored by Diptanshu Jamgade's avatar Diptanshu Jamgade Committed by Gerrit - the friendly Code Review server
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bindings: clock: Add support clock controllers for Lagoon 

Update the CAMCC, DISPCC, GCC, GPUCC, NPUCC VIDEOCC and
Debug clock controller for Lagoon device.

Change-Id: I898d7ee9da47680ba81ea59a20b154404d38ed25
parent cf196176

bindings/clock/qcom,camcc.txt

+1 −1
Original line number Diff line number Diff line
@@ -4,7 +4,7 @@ Qualcomm Technologies, Inc. Camera Clock & Reset Controller Binding 
Required properties :

- compatible: must contain "qcom,camcc-sm8150", "qcom,camcc-sm8150-v2",

		"qcom,camcc-kona", "qcom,camcc-kona-v2" or "qcom,lito-camcc"

		or "qcom,lito-camcc-v2".

		or "qcom,lito-camcc-v2" or "qcom,lagoon-camcc".

- reg: shall contain base register location and length.

- reg-names: names of registers listed in the same order as in

	     the reg property.

bindings/clock/qcom,debugcc.txt

+2 −2
Original line number Diff line number Diff line
@@ -2,8 +2,8 @@ Qualcomm Technologies, Inc. Debug Clock Controller Binding 
----------------------------------------------------------



Required properties :

- compatible: Shall contain "qcom,kona-debugcc", "qcom,lito-debugcc"

		or "qcom,bengal-debugcc".

- compatible: Shall contain "qcom,kona-debugcc", "qcom,lito-debugcc",

		"qcom,bengal-debugcc" or "qcom,lagoon-debugcc".

- qcom,gcc: phandle to the GCC device node.

- qcom,videocc: phandle to the Video CC device node.

- qcom,camcc: phandle to the Camera CC device node.

bindings/clock/qcom,dispcc.txt

+1 −0
Original line number Diff line number Diff line
@@ -8,6 +8,7 @@ Required properties : 
		"qcom,sdm845-dispcc"

		"qcom,lito-dispcc"

		"qcom,bengal-dispcc"

		"qcom,lagoon-dispcc"

- reg : shall contain base register location and length.

- vdd_mm-supply: phandle to the MM_CX rail that needs to be voted on behalf

of the clocks.

bindings/clock/qcom,gcc.txt

+1 −0
Original line number Diff line number Diff line
@@ -23,6 +23,7 @@ Required properties : 
			"qcom,gcc-kona"

			"qcom,gcc-lito"

			"qcom,bengal-gcc"

			"qcom,lagoon-gcc"



- reg : shall contain base register location and length

- #clock-cells : shall contain 1

bindings/clock/qcom,gpucc.txt

+2 −1
Original line number Diff line number Diff line
@@ -5,7 +5,8 @@ Required properties : 
- compatible: shall contain one of the following:

		"qcom,gpucc-kona"

		"qcom,lito-gpucc".

		"qcom,bengal-gpucc".

		"qcom,bengal-gpucc"

		"qcom,lagoon-gpucc".

- reg: shall contain base register offset and size.

- reg-names: names of registers listed in the same order as in the reg property.

		Must contain "cc_base".