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Commit 01b9bea0 authored by Thierry Reding's avatar Thierry Reding
Browse files

drm/tegra: sor: Remove unnecessary conditional



Checking for sor->aux in eDP specific code is unnecessary because eDP
inherently requires a valid AUX channel.

Signed-off-by: default avatarThierry Reding <treding@nvidia.com>
parent 9542c237
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+41 −52
Original line number Original line Diff line number Diff line
@@ -1196,6 +1196,7 @@ static void tegra_sor_edp_enable(struct drm_encoder *encoder)
	struct tegra_sor *sor = to_sor(output);
	struct tegra_sor *sor = to_sor(output);
	struct tegra_sor_config config;
	struct tegra_sor_config config;
	struct drm_dp_link link;
	struct drm_dp_link link;
	u8 rate, lanes;
	int err = 0;
	int err = 0;
	u32 value;
	u32 value;


@@ -1208,18 +1209,15 @@ static void tegra_sor_edp_enable(struct drm_encoder *encoder)
	if (output->panel)
	if (output->panel)
		drm_panel_prepare(output->panel);
		drm_panel_prepare(output->panel);


	if (sor->aux) {
	err = drm_dp_aux_enable(sor->aux);
	err = drm_dp_aux_enable(sor->aux);
	if (err < 0)
	if (err < 0)
		dev_err(sor->dev, "failed to enable DP: %d\n", err);
		dev_err(sor->dev, "failed to enable DP: %d\n", err);


	err = drm_dp_link_probe(sor->aux, &link);
	err = drm_dp_link_probe(sor->aux, &link);
	if (err < 0) {
	if (err < 0) {
			dev_err(sor->dev, "failed to probe eDP link: %d\n",
		dev_err(sor->dev, "failed to probe eDP link: %d\n", err);
				err);
		return;
		return;
	}
	}
	}


	err = clk_set_parent(sor->clk, sor->clk_safe);
	err = clk_set_parent(sor->clk, sor->clk_safe);
	if (err < 0)
	if (err < 0)
@@ -1430,23 +1428,17 @@ static void tegra_sor_edp_enable(struct drm_encoder *encoder)
	value |= SOR_DP_PADCTL_PAD_CAL_PD;
	value |= SOR_DP_PADCTL_PAD_CAL_PD;
	tegra_sor_writel(sor, value, SOR_DP_PADCTL0);
	tegra_sor_writel(sor, value, SOR_DP_PADCTL0);


	if (sor->aux) {
		u8 rate, lanes;

	err = drm_dp_link_probe(sor->aux, &link);
	err = drm_dp_link_probe(sor->aux, &link);
	if (err < 0)
	if (err < 0)
			dev_err(sor->dev, "failed to probe eDP link: %d\n",
		dev_err(sor->dev, "failed to probe eDP link: %d\n", err);
				err);


	err = drm_dp_link_power_up(sor->aux, &link);
	err = drm_dp_link_power_up(sor->aux, &link);
	if (err < 0)
	if (err < 0)
			dev_err(sor->dev, "failed to power up eDP link: %d\n",
		dev_err(sor->dev, "failed to power up eDP link: %d\n", err);
				err);


	err = drm_dp_link_configure(sor->aux, &link);
	err = drm_dp_link_configure(sor->aux, &link);
	if (err < 0)
	if (err < 0)
			dev_err(sor->dev, "failed to configure eDP link: %d\n",
		dev_err(sor->dev, "failed to configure eDP link: %d\n", err);
				err);


	rate = drm_dp_link_rate_to_bw_code(link.rate);
	rate = drm_dp_link_rate_to_bw_code(link.rate);
	lanes = link.num_lanes;
	lanes = link.num_lanes;
@@ -1477,13 +1469,10 @@ static void tegra_sor_edp_enable(struct drm_encoder *encoder)
	tegra_sor_writel(sor, value, SOR_DP_TPG);
	tegra_sor_writel(sor, value, SOR_DP_TPG);


	err = tegra_sor_dp_train_fast(sor, &link);
	err = tegra_sor_dp_train_fast(sor, &link);
		if (err < 0) {
	if (err < 0)
			dev_err(sor->dev, "DP fast link training failed: %d\n",
		dev_err(sor->dev, "DP fast link training failed: %d\n", err);
				err);
		}


	dev_dbg(sor->dev, "fast link training succeeded\n");
	dev_dbg(sor->dev, "fast link training succeeded\n");
	}


	err = tegra_sor_power_up(sor, 250);
	err = tegra_sor_power_up(sor, 250);
	if (err < 0)
	if (err < 0)