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Commit 0145bc38 authored by Coiby Xu's avatar Coiby Xu Committed by Greg Kroah-Hartman
Browse files

pinctrl: amd: fix incorrect way to disable debounce filter 



commit 06abe8291bc31839950f7d0362d9979edc88a666 upstream.

The correct way to disable debounce filter is to clear bit 5 and 6
of the register.

Cc: stable@vger.kerne.org
Signed-off-by: default avatarCoiby Xu <coiby.xu@gmail.com>
Reviewed-by: default avatarHans de Goede <hdegoede@redhat.com>
Cc: Hans de Goede <hdegoede@redhat.com>
Link: https://lore.kernel.org/linux-gpio/df2c008b-e7b5-4fdd-42ea-4d1c62b52139@redhat.com/
Link: https://lore.kernel.org/r/20201105231912.69527-2-coiby.xu@gmail.com


Signed-off-by: default avatarLinus Walleij <linus.walleij@linaro.org>
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
parent 0066e9d0

drivers/pinctrl/pinctrl-amd.c

+2 −2
Original line number Diff line number Diff line
@@ -167,14 +167,14 @@ static int amd_gpio_set_debounce(struct gpio_chip *gc, unsigned offset, 
			pin_reg |= BIT(DB_TMR_OUT_UNIT_OFF);

			pin_reg |= BIT(DB_TMR_LARGE_OFF);

		} else {

			pin_reg &= ~DB_CNTRl_MASK;

			pin_reg &= ~(DB_CNTRl_MASK << DB_CNTRL_OFF);

			ret = -EINVAL;

		}

	} else {

		pin_reg &= ~BIT(DB_TMR_OUT_UNIT_OFF);

		pin_reg &= ~BIT(DB_TMR_LARGE_OFF);

		pin_reg &= ~DB_TMR_OUT_MASK;

		pin_reg &= ~DB_CNTRl_MASK;

		pin_reg &= ~(DB_CNTRl_MASK << DB_CNTRL_OFF);

	}

	writel(pin_reg, gpio_dev->base + offset * 4);

	raw_spin_unlock_irqrestore(&gpio_dev->lock, flags);