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Commit 0122f96f authored by Rob Clark's avatar Rob Clark
Browse files

drm/msm/adreno: slight init order cleanup 



Move anything that can fail after call to base class msm_gpu_init().
This way, if we fail, active_list has already been initialized so we
don't trip 'WARN_ON(!list_empty(&gpu->active_list))' in
msm_gpu_cleanup().

Signed-off-by: default avatarRob Clark <robdclark@gmail.com>
parent b7bbd640

drivers/gpu/drm/msm/adreno/adreno_gpu.c

+6 −6
Original line number Diff line number Diff line
@@ -319,6 +319,12 @@ int adreno_gpu_init(struct drm_device *drm, struct platform_device *pdev, 
	DBG("fast_rate=%u, slow_rate=%u, bus_freq=%u",

			gpu->fast_rate, gpu->slow_rate, gpu->bus_freq);



	ret = msm_gpu_init(drm, pdev, &adreno_gpu->base, &funcs->base,

			adreno_gpu->info->name, "kgsl_3d0_reg_memory", "kgsl_3d0_irq",

			RB_SIZE);

	if (ret)

		return ret;



	ret = request_firmware(&adreno_gpu->pm4, adreno_gpu->info->pm4fw, drm->dev);

	if (ret) {

		dev_err(drm->dev, "failed to load %s PM4 firmware: %d\n",
@@ -333,12 +339,6 @@ int adreno_gpu_init(struct drm_device *drm, struct platform_device *pdev, 
		return ret;

	}



	ret = msm_gpu_init(drm, pdev, &adreno_gpu->base, &funcs->base,

			adreno_gpu->info->name, "kgsl_3d0_reg_memory", "kgsl_3d0_irq",

			RB_SIZE);

	if (ret)

		return ret;



	mmu = gpu->mmu;

	if (mmu) {

		ret = mmu->funcs->attach(mmu, iommu_ports,