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Commit 007108a2 authored by Olof Johansson's avatar Olof Johansson
Browse files

Merge branch 'next/cleanup-samsung-2' of... 

Merge branch 'next/cleanup-samsung-2' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into next/cleanup

From Kukjin Kim:
* 'next/cleanup-samsung-2' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung:
  ARM: SAMSUNG: use devm_ functions for ADC driver
  ARM: EXYNOS: no duplicate mask/unmask in eint0_15
  ARM: S3C24XX: SPI clock channel setup is fixed for S3C2443
  ARM: EXYNOS: Remove i2c0 resource information and setting of device names
  ARM: S3C64XX: Statically define parent clock of "camera" clock
  ARM: S3C64XX: Remove duplicated camera clock
  ARM: EXYNOS: Add missing static storage class specifiers in clock-exynos5.c
  ARM: EXYNOS: Make combiner_of_init function static
  ARM: EXYNOS: Make s3c_device_i2c0 always use id 0
  ARM: EXYNOS: Remove wrongly placed usb2.0 PHY_CFG definition from PMU_REG
  ARM: EXYNOS: reorder inclusions of <linux/platform_data/xxx.h>
  ARM: EXYNOS: Remove unused static uart resource information
  ARM: EXYNOS: Remove static io-remapping for gic and combiner
  ARM: EXYNOS: Remove wrong I2S0 clock from peril clock
  ARM: EXYNOS: remove the MMC_CAP2_BROKEN_VOLTAGE
parents 8f3c5ba7 2ee8e6f0

arch/arm/mach-exynos/clock-exynos4.c

+0 −5
Original line number Diff line number Diff line
@@ -611,11 +611,6 @@ static struct clk exynos4_init_clocks_off[] = { 
		.devname	= "exynos4210-spi.2",

		.enable		= exynos4_clk_ip_peril_ctrl,

		.ctrlbit	= (1 << 18),

	}, {

		.name		= "iis",

		.devname	= "samsung-i2s.0",

		.enable		= exynos4_clk_ip_peril_ctrl,

		.ctrlbit	= (1 << 19),

	}, {

		.name		= "iis",

		.devname	= "samsung-i2s.1",

arch/arm/mach-exynos/clock-exynos5.c

+9 −9
Original line number Diff line number Diff line
@@ -292,7 +292,7 @@ static struct clksrc_sources exynos5_clk_src_mpll = { 
	.nr_sources	= ARRAY_SIZE(exynos5_clk_src_mpll_list),

};



struct clksrc_clk exynos5_clk_mout_mpll = {

static struct clksrc_clk exynos5_clk_mout_mpll = {

	.clk = {

		.name		= "mout_mpll",

	},
@@ -467,12 +467,12 @@ static struct clksrc_clk exynos5_clk_pclk_acp = { 


/* Core list of CMU_TOP side */



struct clk *exynos5_clkset_aclk_top_list[] = {

static struct clk *exynos5_clkset_aclk_top_list[] = {

	[0] = &exynos5_clk_mout_mpll_user.clk,

	[1] = &exynos5_clk_mout_bpll_user.clk,

};



struct clksrc_sources exynos5_clkset_aclk = {

static struct clksrc_sources exynos5_clkset_aclk = {

	.sources	= exynos5_clkset_aclk_top_list,

	.nr_sources	= ARRAY_SIZE(exynos5_clkset_aclk_top_list),

};
@@ -486,12 +486,12 @@ static struct clksrc_clk exynos5_clk_aclk_400 = { 
	.reg_div = { .reg = EXYNOS5_CLKDIV_TOP0, .shift = 24, .size = 3 },

};



struct clk *exynos5_clkset_aclk_333_166_list[] = {

static struct clk *exynos5_clkset_aclk_333_166_list[] = {

	[0] = &exynos5_clk_mout_cpll.clk,

	[1] = &exynos5_clk_mout_mpll_user.clk,

};



struct clksrc_sources exynos5_clkset_aclk_333_166 = {

static struct clksrc_sources exynos5_clkset_aclk_333_166 = {

	.sources	= exynos5_clkset_aclk_333_166_list,

	.nr_sources	= ARRAY_SIZE(exynos5_clkset_aclk_333_166_list),

};
@@ -966,7 +966,7 @@ static struct clk exynos5_clk_fimd1 = { 
	.ctrlbit	= (1 << 0),

};



struct clk *exynos5_clkset_group_list[] = {

static struct clk *exynos5_clkset_group_list[] = {

	[0] = &clk_ext_xtal_mux,

	[1] = NULL,

	[2] = &exynos5_clk_sclk_hdmi24m,
@@ -979,7 +979,7 @@ struct clk *exynos5_clkset_group_list[] = { 
	[9] = &exynos5_clk_mout_cpll.clk,

};



struct clksrc_sources exynos5_clkset_group = {

static struct clksrc_sources exynos5_clkset_group = {

	.sources	= exynos5_clkset_group_list,

	.nr_sources	= ARRAY_SIZE(exynos5_clkset_group_list),

};
@@ -1195,7 +1195,7 @@ static struct clksrc_clk exynos5_clk_sclk_spi2 = { 
	.reg_div = { .reg = EXYNOS5_CLKDIV_PERIC2, .shift = 8, .size = 8 },

};



struct clksrc_clk exynos5_clk_sclk_fimd1 = {

static struct clksrc_clk exynos5_clk_sclk_fimd1 = {

	.clk	= {

		.name		= "sclk_fimd",

		.devname	= "exynos5-fb.1",
@@ -1476,7 +1476,7 @@ static void exynos5_clock_resume(void) 
#define exynos5_clock_resume NULL

#endif



struct syscore_ops exynos5_clock_syscore_ops = {

static struct syscore_ops exynos5_clock_syscore_ops = {

	.suspend	= exynos5_clock_suspend,

	.resume		= exynos5_clock_resume,

};

arch/arm/mach-exynos/common.c

+8 −50
Original line number Diff line number Diff line
@@ -63,7 +63,7 @@ static void exynos4_map_io(void); 
static void exynos5_map_io(void);

static void exynos4_init_clocks(int xtal);

static void exynos5_init_clocks(int xtal);

static void exynos_init_uarts(struct s3c2410_uartcfg *cfg, int no);

static void exynos4_init_uarts(struct s3c2410_uartcfg *cfg, int no);

static int exynos_init(void);



static struct cpu_table cpu_ids[] __initdata = {
@@ -72,7 +72,7 @@ static struct cpu_table cpu_ids[] __initdata = { 
		.idmask		= EXYNOS4_CPU_MASK,

		.map_io		= exynos4_map_io,

		.init_clocks	= exynos4_init_clocks,

		.init_uarts	= exynos_init_uarts,

		.init_uarts	= exynos4_init_uarts,

		.init		= exynos_init,

		.name		= name_exynos4210,

	}, {
@@ -80,7 +80,7 @@ static struct cpu_table cpu_ids[] __initdata = { 
		.idmask		= EXYNOS4_CPU_MASK,

		.map_io		= exynos4_map_io,

		.init_clocks	= exynos4_init_clocks,

		.init_uarts	= exynos_init_uarts,

		.init_uarts	= exynos4_init_uarts,

		.init		= exynos_init,

		.name		= name_exynos4212,

	}, {
@@ -88,7 +88,7 @@ static struct cpu_table cpu_ids[] __initdata = { 
		.idmask		= EXYNOS4_CPU_MASK,

		.map_io		= exynos4_map_io,

		.init_clocks	= exynos4_init_clocks,

		.init_uarts	= exynos_init_uarts,

		.init_uarts	= exynos4_init_uarts,

		.init		= exynos_init,

		.name		= name_exynos4412,

	}, {
@@ -96,7 +96,6 @@ static struct cpu_table cpu_ids[] __initdata = { 
		.idmask		= EXYNOS5_SOC_MASK,

		.map_io		= exynos5_map_io,

		.init_clocks	= exynos5_init_clocks,

		.init_uarts	= exynos_init_uarts,

		.init		= exynos_init,

		.name		= name_exynos5250,

	},
@@ -256,26 +255,11 @@ static struct map_desc exynos5_iodesc[] __initdata = { 
		.pfn		= __phys_to_pfn(EXYNOS5_PA_PMU),

		.length		= SZ_64K,

		.type		= MT_DEVICE,

	}, {

		.virtual	= (unsigned long)S5P_VA_COMBINER_BASE,

		.pfn		= __phys_to_pfn(EXYNOS5_PA_COMBINER),

		.length		= SZ_4K,

		.type		= MT_DEVICE,

	}, {

		.virtual	= (unsigned long)S3C_VA_UART,

		.pfn		= __phys_to_pfn(EXYNOS5_PA_UART),

		.length		= SZ_512K,

		.type		= MT_DEVICE,

	}, {

		.virtual	= (unsigned long)S5P_VA_GIC_CPU,

		.pfn		= __phys_to_pfn(EXYNOS5_PA_GIC_CPU),

		.length		= SZ_8K,

		.type		= MT_DEVICE,

	}, {

		.virtual	= (unsigned long)S5P_VA_GIC_DIST,

		.pfn		= __phys_to_pfn(EXYNOS5_PA_GIC_DIST),

		.length		= SZ_4K,

		.type		= MT_DEVICE,

	},

};
@@ -354,23 +338,6 @@ static void __init exynos4_map_io(void) 
static void __init exynos5_map_io(void)

{

	iotable_init(exynos5_iodesc, ARRAY_SIZE(exynos5_iodesc));



	s3c_device_i2c0.resource[0].start = EXYNOS5_PA_IIC(0);

	s3c_device_i2c0.resource[0].end   = EXYNOS5_PA_IIC(0) + SZ_4K - 1;

	s3c_device_i2c0.resource[1].start = EXYNOS5_IRQ_IIC;

	s3c_device_i2c0.resource[1].end   = EXYNOS5_IRQ_IIC;



	s3c_sdhci_setname(0, "exynos4-sdhci");

	s3c_sdhci_setname(1, "exynos4-sdhci");

	s3c_sdhci_setname(2, "exynos4-sdhci");

	s3c_sdhci_setname(3, "exynos4-sdhci");



	/* The I2C bus controllers are directly compatible with s3c2440 */

	s3c_i2c0_setname("s3c2440-i2c");

	s3c_i2c1_setname("s3c2440-i2c");

	s3c_i2c2_setname("s3c2440-i2c");



	s3c64xx_spi_setname("exynos4210-spi");

}



static void __init exynos4_init_clocks(int xtal)
@@ -589,7 +556,8 @@ static void __init combiner_init(void __iomem *combiner_base, 
}



#ifdef CONFIG_OF

int __init combiner_of_init(struct device_node *np, struct device_node *parent)

static int __init combiner_of_init(struct device_node *np,

				   struct device_node *parent)

{

	void __iomem *combiner_base;
@@ -727,7 +695,7 @@ static int __init exynos_init(void) 


/* uart registration process */



static void __init exynos_init_uarts(struct s3c2410_uartcfg *cfg, int no)

static void __init exynos4_init_uarts(struct s3c2410_uartcfg *cfg, int no)

{

	struct s3c2410_uartcfg *tcfg = cfg;

	u32 ucnt;
@@ -735,9 +703,6 @@ static void __init exynos_init_uarts(struct s3c2410_uartcfg *cfg, int no) 
	for (ucnt = 0; ucnt < no; ucnt++, tcfg++)

		tcfg->has_fracval = 1;



	if (soc_is_exynos5250())

		s3c24xx_init_uartdevs("exynos4210-uart", exynos5_uart_resources, cfg, no);

	else

	s3c24xx_init_uartdevs("exynos4210-uart", exynos4_uart_resources, cfg, no);

}
@@ -970,14 +935,7 @@ static void exynos_irq_eint0_15(unsigned int irq, struct irq_desc *desc) 
	struct irq_chip *chip = irq_get_chip(irq);



	chained_irq_enter(chip, desc);

	chip->irq_mask(&desc->irq_data);



	if (chip->irq_ack)

		chip->irq_ack(&desc->irq_data);



	generic_handle_irq(*irq_data);



	chip->irq_unmask(&desc->irq_data);

	chained_irq_exit(chip, desc);

}

arch/arm/mach-exynos/dev-audio.c

+1 −1
Original line number Diff line number Diff line
@@ -14,9 +14,9 @@ 
#include <linux/platform_device.h>

#include <linux/dma-mapping.h>

#include <linux/gpio.h>

#include <linux/platform_data/asoc-s3c.h>



#include <plat/gpio-cfg.h>

#include <linux/platform_data/asoc-s3c.h>



#include <mach/map.h>

#include <mach/dma.h>

arch/arm/mach-exynos/dev-ohci.c

+1 −1
Original line number Diff line number Diff line
@@ -12,10 +12,10 @@ 


#include <linux/dma-mapping.h>

#include <linux/platform_device.h>

#include <linux/platform_data/usb-exynos.h>



#include <mach/irqs.h>

#include <mach/map.h>

#include <linux/platform_data/usb-exynos.h>



#include <plat/devs.h>

#include <plat/usb-phy.h>