LCD: Fix hbm screen flash in VBP way1 (a85ca95e) · Commits · e / devices / android_kernel_nothing_tetris-device_modules

drivers/gpu/drm/mediatek/mediatek_v2/mtk_drm_crtc.c

+5 −9

Original line number	Diff line number	Diff line
		@@ -2135,8 +2135,7 @@ int mtk_drm_crtc_set_panel_hbm(struct drm_crtc *crtc, bool en)
		struct cmdq_client *client;
		bool is_frame_mode;
		bool state = false;

		int fps = drm_mode_vrefresh(&crtc->state->adjusted_mode);
		int wait_count = 2;
		struct mtk_crtc_state *mtk_state = to_mtk_crtc_state(crtc->state);
		struct mtk_cmdq_cb_data *cb_data;

		@@ -2174,7 +2173,10 @@ int mtk_drm_crtc_set_panel_hbm(struct drm_crtc *crtc, bool en)

		/Wait TE, then set hbm cmd/
		if (!mtk_state->prop_val[CRTC_PROP_DOZE_ACTIVE]) {
		while (wait_count) {
		comp->funcs->io_cmd(comp, NULL, DSI_HBM_WAIT, NULL);
		wait_count--;
		}
		}

		mtk_crtc_wait_frame_done(mtk_crtc, cmdq_handle, DDP_FIRST_PATH, 0);
		@@ -2209,12 +2211,6 @@ int mtk_drm_crtc_set_panel_hbm(struct drm_crtc *crtc, bool en)

		if (en) {
		cmdq_pkt_flush_threaded(cmdq_handle, hbm_cmdq_cb, cb_data);
		if (fps == 120) {
		/* dealy one frame to wait hbm work */
		if (!mtk_state->prop_val[CRTC_PROP_DOZE_ACTIVE]) {
		comp->funcs->io_cmd(comp, NULL, DSI_HBM_WAIT, NULL);
		}
		}
		} else {
		cmdq_pkt_flush(cmdq_handle);
		cmdq_pkt_destroy(cmdq_handle);

drivers/gpu/drm/mediatek/mediatek_v2/mtk_dsi.c

+110 −2

Original line number	Diff line number	Diff line
		@@ -271,6 +271,8 @@
		//#define DSI_VM_CMD_CON 0x130
		#define VM_CMD_EN BIT(0)
		#define TS_VFP_EN BIT(5)
		#define TS_VSA_EN BIT(3)
		#define TS_VBP_EN BIT(4)
		//#define DSI_VM_CMD_DATA0 0x134
		//#define DSI_VM_CMD_DATA10 0x180
		//#define DSI_VM_CMD_DATA20 0x1A0
		@@ -426,7 +428,7 @@ static void mtk_dsi_set_targetline(struct mtk_ddp_comp *comp,
		struct cmdq_pkt *handle, unsigned int hactive);
		static void DSI_MIPI_deskew(struct mtk_dsi *dsi);
		void mipi_dsi_dcs_write_gce(struct mtk_dsi dsi, struct cmdq_pkt handle, const void *data, size_t len);

		void mipi_dsi_brightness_dcs_write_gce(struct mtk_dsi dsi, struct cmdq_pkt handle, const void *data, size_t len);
		static inline struct mtk_dsi encoder_to_dsi(struct drm_encoder e)
		{
		return container_of(e, struct mtk_dsi, encoder);
		@@ -6069,6 +6071,32 @@ static void build_vm_cmdq(struct mtk_dsi *dsi,
		}
		}

		static void mtk_dsi_brightness_vm_cmdq(struct mtk_dsi *dsi,
		const struct mipi_dsi_msg msg, struct cmdq_pkt handle)
		{
		const char *tx_buf = msg->tx_buf;
		u8 config, type = msg->type;
		u32 reg_val;
		config = (msg->tx_len > 2) ? VM_LONG_PACKET : 0;
		if(dsi->driver_data->vm_rgb_time_interval)
		config \|= (1 << 2);
		if (msg->tx_len > 2) {
		build_vm_cmdq(dsi, msg, handle);
		reg_val = (msg->tx_len << 16) \| (type << 8) \| config;
		} else if (msg->tx_len == 2) {
		reg_val = (tx_buf[1] << 24) \| (tx_buf[0] << 16) \|
		(type << 8) \| config;
		} else {
		reg_val = (tx_buf[0] << 16) \| (type << 8) \| config;
		}
		reg_val \|= (VM_CMD_EN + TS_VSA_EN + TS_VBP_EN);
		if (handle == NULL)
		writel(reg_val, dsi->regs + dsi->driver_data->reg_vm_cmd_con_ofs);
		else
		cmdq_pkt_write(handle, dsi->ddp_comp.cmdq_base,
		dsi->ddp_comp.regs_pa + dsi->driver_data->reg_vm_cmd_con_ofs, reg_val, ~0);
		}

		static void mtk_dsi_vm_cmdq(struct mtk_dsi *dsi,
		const struct mipi_dsi_msg msg, struct cmdq_pkt handle)
		{
		@@ -6446,6 +6474,86 @@ static void mtk_dsi_cmdq_grp_gce(struct mtk_dsi dsi, struct cmdq_pkt handle,
		CMDQ_SIZE);
		}

		void mipi_dsi_brightness_dcs_write_gce(struct mtk_dsi dsi, struct cmdq_pkt handle,
		const void *data, size_t len)
		{
		struct mipi_dsi_msg msg = {
		.tx_buf = data,
		.tx_len = len
		};
		switch (len) {
		case 0:
		return;
		case 1:
		msg.type = MIPI_DSI_DCS_SHORT_WRITE;
		break;
		case 2:
		msg.type = MIPI_DSI_DCS_SHORT_WRITE_PARAM;
		break;
		default:
		msg.type = MIPI_DSI_DCS_LONG_WRITE;
		break;
		}
		mtk_dsi_power_keep_gce(dsi, handle, true);
		if (mtk_dsi_is_cmd_mode(&dsi->ddp_comp)) {
		mtk_dsi_poll_for_idle(dsi, handle);
		mtk_dsi_cmdq_gce(dsi, handle, &msg);
		if (dsi->slave_dsi) {
		if (dsi->ext->params->lcm_cmd_if == MTK_PANEL_DUAL_PORT) {
		mtk_dsi_cmdq_gce(dsi->slave_dsi, handle, &msg);
		cmdq_pkt_write(handle, dsi->slave_dsi->ddp_comp.cmdq_base,
		dsi->slave_dsi->ddp_comp.regs_pa + DSI_CON_CTRL,
		DSI_DUAL_EN, DSI_DUAL_EN);
		} else
		cmdq_pkt_write(handle, dsi->slave_dsi->ddp_comp.cmdq_base,
		dsi->slave_dsi->ddp_comp.regs_pa + DSI_CON_CTRL,
		0x0, DSI_DUAL_EN);
		}
		if (mtk_dsi_is_cmd_mode(&dsi->ddp_comp) && dsi->driver_data->require_phy_reset) {
		/* CMD mode require phy reset only */
		mtk_dsi_runtime_phy_reset_gce(dsi, handle);
		}
		cmdq_pkt_write(handle, dsi->ddp_comp.cmdq_base,
		dsi->ddp_comp.regs_pa + DSI_START, 0x0, ~0);
		cmdq_pkt_write(handle, dsi->ddp_comp.cmdq_base,
		dsi->ddp_comp.regs_pa + DSI_START, 0x1, ~0);
		cmdq_pkt_write(handle, dsi->ddp_comp.cmdq_base,
		dsi->ddp_comp.regs_pa + DSI_START, 0x0, ~0);
		mtk_dsi_poll_for_idle(dsi, handle);
		if (dsi->slave_dsi) {
		cmdq_pkt_write(handle, dsi->slave_dsi->ddp_comp.cmdq_base,
		dsi->slave_dsi->ddp_comp.regs_pa + DSI_CON_CTRL,
		DSI_DUAL_EN, DSI_DUAL_EN);
		}
		} else {
		/* set BL cmd */
		mtk_dsi_brightness_vm_cmdq(dsi, &msg, handle);
		/* clear VM_CMD_DONE */
		cmdq_pkt_write(handle, dsi->ddp_comp.cmdq_base,
		dsi->ddp_comp.regs_pa + DSI_INTSTA, 0,
		VM_CMD_DONE_INT_EN);
		/* start to send VM cmd */
		cmdq_pkt_write(handle, dsi->ddp_comp.cmdq_base,
		dsi->ddp_comp.regs_pa + DSI_START, 0,
		VM_CMD_START);
		cmdq_pkt_write(handle, dsi->ddp_comp.cmdq_base,
		dsi->ddp_comp.regs_pa + DSI_START, VM_CMD_START,
		VM_CMD_START);
		/* poll VM cmd done */
		mtk_dsi_cmdq_poll(&dsi->ddp_comp, handle,
		dsi->ddp_comp.regs_pa + DSI_INTSTA,
		VM_CMD_DONE_INT_EN, VM_CMD_DONE_INT_EN);
		cmdq_pkt_write(handle, dsi->ddp_comp.cmdq_base,
		dsi->ddp_comp.regs_pa + DSI_START, 0,
		VM_CMD_START);
		/* clear VM_CMD_DONE */
		cmdq_pkt_write(handle, dsi->ddp_comp.cmdq_base,
		dsi->ddp_comp.regs_pa + DSI_INTSTA, 0,
		VM_CMD_DONE_INT_EN);
		}
		mtk_dsi_power_keep_gce(dsi, handle, false);
		}

		void mipi_dsi_dcs_write_gce(struct mtk_dsi dsi, struct cmdq_pkt handle,
		const void *data, size_t len)
		{
		@@ -10725,7 +10833,7 @@ static int mtk_dsi_io_cmd(struct mtk_ddp_comp comp, struct cmdq_pkt handle,
		if (panel_ext && panel_ext->funcs
		&& panel_ext->funcs->set_backlight_cmdq)
		panel_ext->funcs->set_backlight_cmdq(dsi,
		mipi_dsi_dcs_write_gce,
		mipi_dsi_brightness_dcs_write_gce,
		handle, (int )params);
		}
		break;

drivers/gpu/drm/panel/panel-samsung-s6e8fc3x02.c

+2 −0

Original line number	Diff line number	Diff line
		@@ -916,6 +916,7 @@ static struct mtk_panel_params ext_params_120hz = {
		// .switch_en = 1,
		// .data_rate = 1108 + 10,
		// },
		.hbm_en_time = 1,
		.round_corner_en = 1,
		.corner_pattern_height = ROUND_CORNER_H_TOP,
		.corner_pattern_height_bot = ROUND_CORNER_H_BOT,
		@@ -1000,6 +1001,7 @@ static struct mtk_panel_params ext_params_60hz = {
		// .switch_en = 1,
		// .data_rate = 1108 + 10,
		// },
		.hbm_en_time = 1,
		.round_corner_en = 1,
		.corner_pattern_height = ROUND_CORNER_H_TOP,
		.corner_pattern_height_bot = ROUND_CORNER_H_BOT,